Re: [PATCH 1/5] perf, x86: Improve basic Ivy Bridge support v3

Peter Zijlstra
2012-07-02T19:26:54Z

On Mon, 2012-07-02 at 11:43 -0700, Andi Kleen wrote:
> - As Stephane pointed out .code=0xb1, .umask=0x01 is gone from the
> event list,
> so don't do a generic backend stall event on IvyBridge.

325462-043US, May 2012:

Page 3135, Table 19-2. Non-Architectural Performance Events In the
Processor Core of Third Generation Intel Core i7, i5, i3 Processors

(aka. IvyBridge)

B1H 01H UOPS_EXECUTED.THREAD Counts total number of uops to be
executed per-thread each cycle. Set
Cmask = 1, INV =1 to count stall
cycles.