Re: perf with precise attribute kills all KVM based VMs

[Gleb Natapov <gleb@redhat.com>]

On Tue, Jul 10, 2012 at 05:38:40PM -0600, David Ahern wrote:
> On 7/9/12 8:59 AM, Peter Zijlstra wrote:
> >On Mon, 2012-07-09 at 17:51 +0300, Avi Kivity wrote:
> >>On 07/09/2012 05:49 PM, Peter Zijlstra wrote:
> >>>On Mon, 2012-07-09 at 08:47 -0600, David Ahern wrote:
> >>>>
> >>>>I found this testing changes to perf-kvm, but found the problem extends
> >>>>to just perf-record. With perf-record exclude_guest defaults to 1. See
> >>>>tools/perf/util/util.c, event_attr_init().
> >>>
> >>>You lost me there.. so perf-record defaults to exclude_guest=1 (which
> >>>would make the proposed patch I just send actually possible), but its
> >>>still going *bang* ?
> >>
> >>It's possible that the DS writes overshoot the MSR... or that there's a
> >>bug somewhere.
> >
> >OK, so the first thing to stare at is in what order the MSRs are
> >touched, I think you first need to stop the counter, then clear the PEBS
> >bits, then clear the DS_AREA one.
> >
> 
> Any updates on the options for this or is there still squinting
> going on with MSR orders?
> 
Looks like Avi is right about the overshoot. Can you test something like this?

diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 166546e..5fb371a 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1374,8 +1374,11 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr)
 	arr[0].msr = MSR_CORE_PERF_GLOBAL_CTRL;
 	arr[0].host = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask;
 	arr[0].guest = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_host_mask;
+	arr[1].msr = MSR_IA32_PEBS_ENABLE;
+	arr[1].host = cpuc->pebs_enabled;
+	arr[1].guest = 0;
+	*nr = 2;
 
-	*nr = 1;
 	return arr;
 }
 

> I guess it's a good thing Ingo's request for :pp to be the default
> was not implemented:
>   https://lkml.org/lkml/2012/5/14/26
> 
> David

--
			Gleb.