Re: perf with precise attribute kills all KVM based VMs

[Gleb Natapov <gleb@redhat.com>]

On Wed, Jul 11, 2012 at 11:49:47AM +0200, Peter Zijlstra wrote:
> On Wed, 2012-07-11 at 10:10 +0300, Gleb Natapov wrote:
> 
> > Looks like Avi is right about the overshoot. Can you test something like this?
> > 
> > diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
> > index 166546e..5fb371a 100644
> > --- a/arch/x86/kernel/cpu/perf_event_intel.c
> > +++ b/arch/x86/kernel/cpu/perf_event_intel.c
> > @@ -1374,8 +1374,11 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr)
> >  	arr[0].msr = MSR_CORE_PERF_GLOBAL_CTRL;
> >  	arr[0].host = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask;
> >  	arr[0].guest = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_host_mask;
> > +	arr[1].msr = MSR_IA32_PEBS_ENABLE;
> > +	arr[1].host = cpuc->pebs_enabled;
> > +	arr[1].guest = 0;
> > +	*nr = 2;
> >  
> > -	*nr = 1;
> >  	return arr;
> >  }
> 
> 
> You also need to clear TR, BTS, BTINT from MSR_IA32_DEBUGCTLMSR and
> ideally you'd also clear MSR_IA32_DS_AREA so that any write will be a
> proper NULL deref or such.
Yes. With the patch above :pp modifier does not crash guest for me, but
in theory it should since BTS are still written to DS. May be BTS writes do
not overshoot guest entry. Will have to ask Intel for clarification.

--
			Gleb.