From: Arnd Bergmann <arnd@arndb.de>
To: Chao Xie <xiechao.mail@gmail.com>
Cc: haojian.zhuang@gmail.com, mturquette@linaro.org,
viresh.linux@gmail.com, s.hauer@pengutronix.de,
chao.xie@marvell.com, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH V3 1/5] clk: mmp: add mmp specific clocks
Date: Thu, 16 Aug 2012 07:18:01 +0000 [thread overview]
Message-ID: <201208160718.01769.arnd@arndb.de> (raw)
In-Reply-To: <1345086525-12328-2-git-send-email-xiechao.mail@gmail.com>
On Thursday 16 August 2012, Chao Xie wrote:
> +static int clk_apbc_prepare(struct clk_hw *hw)
> +{
> + struct clk_apbc *apbc = to_clk_apbc(hw);
> + unsigned int data;
> + unsigned long flags = 0;
> +
> + /*
> + * It may share same register as MUX clock,
> + * and it will impact FNCLK enable. Spinlock is needed
> + */
> + if (apbc->lock)
> + spin_lock_irqsave(apbc->lock, flags);
> +
> + data = __raw_readl(apbc->base);
> + if (apbc->flags & APBC_POWER_CTRL)
> + data |= APBC_POWER;
> + data |= APBC_FNCLK;
> + __raw_writel(data, apbc->base);
It seems you have missed a few __raw_readl/__raw_writel that still
want to get changed to readl_relaxed/writel_relaxed.
Arnd
next prev parent reply other threads:[~2012-08-16 7:18 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-16 3:08 [PATCH V3 0/5] clk: mmp: add clock framework for mmp Chao Xie
2012-08-16 3:08 ` [PATCH V3 1/5] clk: mmp: add mmp specific clocks Chao Xie
2012-08-16 7:18 ` Arnd Bergmann [this message]
2012-08-16 3:08 ` [PATCH V3 2/5] clk: mmp: add clock definition for pxa168 Chao Xie
2012-08-16 3:08 ` [PATCH V3 3/5] clk: mmp: add clock definition for pxa910 Chao Xie
2012-08-16 7:17 ` Arnd Bergmann
2012-08-16 7:37 ` Chao Xie
2012-08-16 8:09 ` Arnd Bergmann
2012-08-16 3:08 ` [PATCH V3 4/5] clk: mmp: add clock definition for mmp2 Chao Xie
2012-08-16 3:08 ` [PATCH V3 5/5] arm: mmp: make all SOCs use common clock by default Chao Xie
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