Re: 20% performance drop on PostgreSQL 9.2 from kernel 3.5.3 to 3.6-rc5 on AMD chipsets - bisected

Mike Galbraith
2012-09-26T02:23:35Z

On Tue, 2012-09-25 at 20:42 +0200, Borislav Petkov wrote:

> Right, so why did we need it all, in the first place? There has to be
> some reason for it.

Easy. Take two communicating tasks. Is an affine wakeup a good idea?
It depends on how much execution overlap there is. Wake affine when
there is overlap larger than cache miss cost, and you just tossed
throughput into the bin.

select_idle_sibling() was originally about shared L2, where any overlap
was salvageable. On modern processors with no shared L2, you have to
get past the cost, but the gain is still there. Intel wins with loads
that AMD loses very bady on, so I can only guess that Intel must feed
caches more efficiently. Dunno. It just doesn't matter though, point
is that there is a win to be had in both cases, the breakeven just isn't
at the same point.

-Mike