Re: 20% performance drop on PostgreSQL 9.2 from kernel 3.5.3 to 3.6-rc5 on AMD chipsets - bisected

Mike Galbraith
2012-09-25T03:20:41Z

On Mon, 2012-09-24 at 20:10 -0700, Linus Torvalds wrote:
> On Mon, Sep 24, 2012 at 7:49 PM, Mike Galbraith <efault@gmx.de> wrote:
> >
> > Ah. That's what I did to select_idle_sibling() in a nutshell, converted
> > the problematic large L3 packages into multiple ~core2duo pairs, modulo
> > shared L2 'course. Bounce proof, and on Westmere, the jabbering back
> > and forth in L3 somehow doesn't hurt as much as expected, so the things
> > act (more or less, L2 traffic _does_ matter;) like the real deal.
>
> Right. But your patch *only* looked at the pair.
>
> Which may be bounce-proof, but we also saw that it was unacceptable.

Yes. Cross wiring traverse _start_ points should eliminate (well, damp)
bounce as well without killing the 1:N latency/preempt benefits of large
L3 packages. You'll still take a lot of L2 misses while doing futile
traverse when fully committed, but that's a separate issue.

-Mike