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Date: Wed, 26 Sep 2012 00:18:31 +0400
From: Cyrill Gorcunov <gorcunov@openvz.org>
To: Vince Weaver <vincent.weaver@maine.edu>
Cc: linux-kernel@vger.kernel.org, Peter Zijlstra <a.p.zijlstra@chello.nl>,
        Paul Mackerras <paulus@samba.org>, Ingo Molnar <mingo@redhat.com>,
        Arnaldo Carvalho de Melo <acme@ghostprotocols.net>, eranian@gmail.com,
        "Meadows, Lawrence F" <lawrence.f.meadows@intel.com>
Subject: Re: [PATCH V2 1/1] perf, Add support for Xeon-Phi PMU
Message-ID: <20120925201831.GB31526@moon>
References: <alpine.DEB.2.02.1209251215340.8741@vincent-weaver-1.um.maine.edu>
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On Tue, Sep 25, 2012 at 12:23:23PM -0400, Vince Weaver wrote:
> Hello
> 
> This is an updated version of the patch.  It uses
> ARCH_PERFMON_EVENTSEL_INT for the DATA_READ event, with the assumption
> that x86_pmu_hw_config() is going to set that bit anyway.  This lets
> the code get through the test for an event being 0 without
> triggering -ENOENT.

FWIW, looks good to me, thanks Vince!