From: Andi Kleen <andi@firstfloor.org>
To: "Ma, Ling" <ling.ma@intel.com>
Cc: Andi Kleen <andi@firstfloor.org>, "mingo@elte.hu" <mingo@elte.hu>,
"hpa@zytor.com" <hpa@zytor.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"iant@google.com" <iant@google.com>
Subject: Re: [PATCH RFC 2/2] [x86] Optimize copy_page by re-arranging instruction sequence and saving register
Date: Fri, 12 Oct 2012 17:14:10 +0200 [thread overview]
Message-ID: <20121012151410.GB16230@one.firstfloor.org> (raw)
In-Reply-To: <B2310DA9850C8743AA7AA0055500E90F0FD70B53@SHSMSX102.ccr.corp.intel.com>
On Fri, Oct 12, 2012 at 02:54:54PM +0000, Ma, Ling wrote:
> > If you can't test the CPUs who run this code I think it's safer if you
> > add a new variant for Atom, not change the existing well tested code.
> > Otherwise you risk performance regressions on these older CPUs.
>
> I found one older machine, and tested the code on it, the results between them are almost the same as below(attached cpu info).
Was that a P4 (family 15)?
Those were the main users. There were a few others, but they are obscure
(early steppings of K8)
-Andi
--
ak@linux.intel.com -- Speaking for myself only.
next prev parent reply other threads:[~2012-10-12 15:14 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-11 12:29 [PATCH RFC 2/2] [x86] Optimize copy_page by re-arranging instruction sequence and saving register ling.ma
2012-10-11 13:40 ` Andi Kleen
2012-10-12 3:10 ` Ma, Ling
2012-10-12 13:35 ` Andi Kleen
2012-10-12 14:54 ` Ma, Ling
2012-10-12 15:14 ` Andi Kleen [this message]
2012-10-11 14:35 ` Konrad Rzeszutek Wilk
2012-10-12 3:37 ` Ma, Ling
2012-10-12 6:18 ` Borislav Petkov
2012-10-12 9:07 ` Ma, Ling
2012-10-12 18:04 ` Borislav Petkov
2012-10-14 10:58 ` Borislav Petkov
2012-10-15 5:00 ` Ma, Ling
2012-10-15 5:13 ` George Spelvin
-- strict thread matches above, loose matches on Subject: below --
2012-10-12 21:02 George Spelvin
2012-10-12 23:17 ` Borislav Petkov
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