From: Gleb Natapov <gleb@redhat.com>
To: Andi Kleen <andi@firstfloor.org>
Cc: linux-kernel@vger.kernel.org, acme@redhat.com,
peterz@infradead.org, jolsa@redhat.com, eranian@google.com,
mingo@kernel.org, Andi Kleen <ak@linux.intel.com>,
avi@redhat.com
Subject: Re: [PATCH 05/33] perf, kvm: Support the intx/intx_cp modifiers in KVM arch perfmon emulation v3
Date: Tue, 30 Oct 2012 11:25:40 +0200 [thread overview]
Message-ID: <20121030092540.GG29310@redhat.com> (raw)
In-Reply-To: <1351283415-13170-6-git-send-email-andi@firstfloor.org>
On Fri, Oct 26, 2012 at 01:29:47PM -0700, Andi Kleen wrote:
> From: Andi Kleen <ak@linux.intel.com>
>
> This is not arch perfmon, but older CPUs will just ignore it. This makes
> it possible to do at least some TSX measurements from a KVM guest
>
> Cc: avi@redhat.com
> Cc: gleb@redhat.com
> v2: Various fixes to address review feedback
> v3: Ignore the bits when no CPUID. No #GP. Force raw events with TSX bits.
> Cc: gleb@redhat.com
> Signed-off-by: Andi Kleen <ak@linux.intel.com>
> ---
> arch/x86/include/asm/kvm_host.h | 1 +
> arch/x86/kvm/pmu.c | 34 ++++++++++++++++++++++++++--------
> 2 files changed, 27 insertions(+), 8 deletions(-)
>
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index b2e11f4..6783289 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -318,6 +318,7 @@ struct kvm_pmu {
> u64 global_ovf_ctrl;
> u64 counter_bitmask[2];
> u64 global_ctrl_mask;
> + u64 cpuid_word9;
> u8 version;
> struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
> struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
> diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
> index cfc258a..8bc954a 100644
> --- a/arch/x86/kvm/pmu.c
> +++ b/arch/x86/kvm/pmu.c
> @@ -160,7 +160,7 @@ static void stop_counter(struct kvm_pmc *pmc)
>
> static void reprogram_counter(struct kvm_pmc *pmc, u32 type,
> unsigned config, bool exclude_user, bool exclude_kernel,
> - bool intr)
> + bool intr, bool intx, bool intx_cp)
> {
> struct perf_event *event;
> struct perf_event_attr attr = {
> @@ -173,6 +173,11 @@ static void reprogram_counter(struct kvm_pmc *pmc, u32 type,
> .exclude_kernel = exclude_kernel,
> .config = config,
> };
> + /* Will be ignored on CPUs that don't support this. */
> + if (intx)
> + attr.config |= HSW_INTX;
> + if (intx_cp)
> + attr.config |= HSW_INTX_CHECKPOINTED;
>
> attr.sample_period = (-pmc->counter) & pmc_bitmask(pmc);
>
> @@ -206,7 +211,8 @@ static unsigned find_arch_event(struct kvm_pmu *pmu, u8 event_select,
> return arch_events[i].event_type;
> }
>
> -static void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)
> +static void reprogram_gp_counter(struct kvm_pmu *pmu, struct kvm_pmc *pmc,
> + u64 eventsel)
> {
> unsigned config, type = PERF_TYPE_RAW;
> u8 event_select, unit_mask;
> @@ -224,9 +230,16 @@ static void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)
> event_select = eventsel & ARCH_PERFMON_EVENTSEL_EVENT;
> unit_mask = (eventsel & ARCH_PERFMON_EVENTSEL_UMASK) >> 8;
>
> + if (!(boot_cpu_has(X86_FEATURE_HLE) ||
> + boot_cpu_has(X86_FEATURE_RTM)) ||
> + !(pmu->cpuid_word9 & (X86_FEATURE_HLE|X86_FEATURE_RTM)))
> + eventsel &= ~(HSW_INTX|HSW_INTX_CHECKPOINTED);
If you put this check into kvm_pmu_cpuid_update() and disallow guest to
set those bits in the first place by choosing appropriate reserved mask
you will not need this check here. This will simplify the code and will
make emulation more correct.
> +
> if (!(eventsel & (ARCH_PERFMON_EVENTSEL_EDGE |
> ARCH_PERFMON_EVENTSEL_INV |
> - ARCH_PERFMON_EVENTSEL_CMASK))) {
> + ARCH_PERFMON_EVENTSEL_CMASK |
> + HSW_INTX |
> + HSW_INTX_CHECKPOINTED))) {
> config = find_arch_event(&pmc->vcpu->arch.pmu, event_select,
> unit_mask);
> if (config != PERF_COUNT_HW_MAX)
> @@ -239,7 +252,9 @@ static void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)
> reprogram_counter(pmc, type, config,
> !(eventsel & ARCH_PERFMON_EVENTSEL_USR),
> !(eventsel & ARCH_PERFMON_EVENTSEL_OS),
> - eventsel & ARCH_PERFMON_EVENTSEL_INT);
> + eventsel & ARCH_PERFMON_EVENTSEL_INT,
> + (eventsel & HSW_INTX),
> + (eventsel & HSW_INTX_CHECKPOINTED));
> }
>
> static void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 en_pmi, int idx)
> @@ -256,7 +271,7 @@ static void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 en_pmi, int idx)
> arch_events[fixed_pmc_events[idx]].event_type,
> !(en & 0x2), /* exclude user */
> !(en & 0x1), /* exclude kernel */
> - pmi);
> + pmi, false, false);
> }
>
> static inline u8 fixed_en_pmi(u64 ctrl, int idx)
> @@ -289,7 +304,7 @@ static void reprogram_idx(struct kvm_pmu *pmu, int idx)
> return;
>
> if (pmc_is_gp(pmc))
> - reprogram_gp_counter(pmc, pmc->eventsel);
> + reprogram_gp_counter(pmu, pmc, pmc->eventsel);
> else {
> int fidx = idx - INTEL_PMC_IDX_FIXED;
> reprogram_fixed_counter(pmc,
> @@ -400,8 +415,8 @@ int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
> } else if ((pmc = get_gp_pmc(pmu, index, MSR_P6_EVNTSEL0))) {
> if (data == pmc->eventsel)
> return 0;
> - if (!(data & 0xffffffff00200000ull)) {
> - reprogram_gp_counter(pmc, data);
> + if (!(data & 0xfffffffc00200000ull)) {
> + reprogram_gp_counter(pmu, pmc, data);
> return 0;
> }
> }
> @@ -470,6 +485,9 @@ void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu)
> pmu->global_ctrl = ((1 << pmu->nr_arch_gp_counters) - 1) |
> (((1ull << pmu->nr_arch_fixed_counters) - 1) << INTEL_PMC_IDX_FIXED);
> pmu->global_ctrl_mask = ~pmu->global_ctrl;
> +
> + entry = kvm_find_cpuid_entry(vcpu, 7, 0);
> + pmu->cpuid_word9 = entry ? entry->ebx : 0;
> }
>
> void kvm_pmu_init(struct kvm_vcpu *vcpu)
> --
> 1.7.7.6
--
Gleb.
next prev parent reply other threads:[~2012-10-30 9:25 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-26 20:29 perf PMU support for Haswell v4 Andi Kleen
2012-10-26 20:29 ` [PATCH 01/33] perf, x86: Add PEBSv2 record support Andi Kleen
2012-10-29 10:08 ` Namhyung Kim
2012-10-29 10:13 ` Andi Kleen
2012-10-29 10:23 ` Peter Zijlstra
2012-10-26 20:29 ` [PATCH 02/33] perf, x86: Basic Haswell PMU support v2 Andi Kleen
2012-10-26 20:29 ` [PATCH 03/33] perf, x86: Basic Haswell PEBS support v3 Andi Kleen
2012-10-26 20:29 ` [PATCH 04/33] perf, x86: Support the TSX intx/intx_cp qualifiers v2 Andi Kleen
2012-10-26 20:29 ` [PATCH 05/33] perf, kvm: Support the intx/intx_cp modifiers in KVM arch perfmon emulation v3 Andi Kleen
2012-10-30 9:25 ` Gleb Natapov [this message]
2012-10-26 20:29 ` [PATCH 06/33] perf, x86: Support PERF_SAMPLE_ADDR on Haswell Andi Kleen
2012-10-26 20:29 ` [PATCH 07/33] perf, x86: Support Haswell v4 LBR format Andi Kleen
2012-10-26 20:29 ` [PATCH 08/33] perf, x86: Disable LBR recording for unknown LBR_FMT Andi Kleen
2012-10-26 20:29 ` [PATCH 09/33] perf, x86: Support LBR filtering by INTX/NOTX/ABORT v2 Andi Kleen
2012-10-26 20:29 ` [PATCH 10/33] perf, tools: Add abort,notx,intx branch filter options to perf report -j v2 Andi Kleen
2012-10-29 10:19 ` Namhyung Kim
2012-10-26 20:29 ` [PATCH 11/33] perf, tools: Support sorting by intx, abort branch flags Andi Kleen
2012-10-26 20:29 ` [PATCH 12/33] perf, x86: Support full width counting Andi Kleen
2012-10-26 20:29 ` [PATCH 13/33] perf, x86: Avoid checkpointed counters causing excessive TSX aborts v3 Andi Kleen
2012-10-26 20:29 ` [PATCH 14/33] perf, core: Add a concept of a weightened sample Andi Kleen
2012-10-26 20:29 ` [PATCH 15/33] perf, x86: Support weight samples for PEBS Andi Kleen
2012-10-26 20:29 ` [PATCH 16/33] perf, tools: Add support for weight v2 Andi Kleen
2012-10-29 10:44 ` Namhyung Kim
2012-10-29 11:02 ` Andi Kleen
2012-10-26 20:29 ` [PATCH 17/33] perf, tools: Handle XBEGIN like a jump Andi Kleen
2012-10-26 20:30 ` [PATCH 18/33] perf, x86: Support for printing PMU state on spurious PMIs v3 Andi Kleen
2012-10-26 20:30 ` [PATCH 19/33] perf, core: Add generic transaction flags Andi Kleen
2012-10-26 20:30 ` [PATCH 20/33] perf, x86: Add Haswell specific transaction flag reporting Andi Kleen
2012-10-26 20:30 ` [PATCH 21/33] perf, tools: Add support for record transaction flags Andi Kleen
2012-10-29 10:49 ` Namhyung Kim
2012-10-26 20:30 ` [PATCH 22/33] perf, tools: Point --sort documentation to --help Andi Kleen
2012-10-26 20:30 ` [PATCH 23/33] perf, tools: Add browser support for transaction flags Andi Kleen
2012-10-26 20:30 ` [PATCH 24/33] perf, tools: Move parse_events error printing to parse_events_options Andi Kleen
2012-10-27 19:08 ` Jiri Olsa
2012-10-30 11:58 ` [tip:perf/core] perf " tip-bot for Andi Kleen
2012-10-26 20:30 ` [PATCH 25/33] perf, tools: Support events with - in the name Andi Kleen
2012-10-27 19:32 ` Jiri Olsa
2012-10-26 20:30 ` [PATCH 26/33] perf, x86: Report the arch perfmon events in sysfs Andi Kleen
2012-10-26 20:30 ` [PATCH 27/33] tools, perf: Add a precise event qualifier Andi Kleen
2012-10-27 19:35 ` Jiri Olsa
2012-10-28 19:13 ` Andi Kleen
2012-10-28 19:24 ` Jiri Olsa
2012-10-28 20:06 ` Andi Kleen
2012-10-26 20:30 ` [PATCH 28/33] perf, x86: Add Haswell TSX event aliases Andi Kleen
2012-10-26 20:30 ` [PATCH 29/33] perf, tools: Add perf stat --transaction v2 Andi Kleen
2012-10-26 20:30 ` [PATCH 30/33] perf, x86: Add a Haswell precise instructions event Andi Kleen
2012-10-26 20:30 ` [PATCH 31/33] perf, tools: Support generic events as pmu event names v2 Andi Kleen
2012-10-27 19:42 ` Jiri Olsa
2012-10-28 19:12 ` Andi Kleen
2012-10-29 9:23 ` Peter Zijlstra
2012-10-26 20:30 ` [PATCH 32/33] perf, tools: Default to cpu// for events v2 Andi Kleen
2012-10-27 20:16 ` Jiri Olsa
2012-10-26 20:30 ` [PATCH 33/33] perf, tools: List kernel supplied event aliases in perf list v2 Andi Kleen
2012-10-27 20:20 ` Jiri Olsa
2012-10-28 19:05 ` Andi Kleen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20121030092540.GG29310@redhat.com \
--to=gleb@redhat.com \
--cc=acme@redhat.com \
--cc=ak@linux.intel.com \
--cc=andi@firstfloor.org \
--cc=avi@redhat.com \
--cc=eranian@google.com \
--cc=jolsa@redhat.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@kernel.org \
--cc=peterz@infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox