Re: [PATCH V2 0/4] perf, amd: Enable AMD family 15h northbridge counters

[Jacob Shin <jacob.shin@amd.com>]

On Thu, Nov 15, 2012 at 03:31:49PM -0600, Jacob Shin wrote:
> The following patchset enables 4 additional performance counters in
> AMD family 15h processors that counts northbridge events -- such as
> number of DRAM accesses.
> 
> This patchset is based on top of previous work done by Robert Richter
> <rric@kernel.org> :
> 
> https://lkml.org/lkml/2012/6/19/324

Sorry this is a bit unclear, let me clarify, this patchset takes 2 of
Robert's patches from above, and adds 2 more of my own. So these 4
patches are all that's needed to enable AMD family 15h northbridge
performance counters.

If things look okay, please apply to perf/core.

Thanks!

> 
> The main differences are:
> 
> - The northbridge counters are indexed contiguously right above the
>   core performance counters.
> 
> - MSR address offset calculations are moved to architecture specific
>   files.
> 
> - Interrups are set up to be delivered only to a single core.
> 
> V2:
> Seprate out Robert's patches, and add properly ordered certificate of
> origins.
> 
> Jacob Shin (2):
>   perf, x86: Move MSR address offset calculation to architecture
>     specific files
>   perf, amd: Enable northbridge performance counters on AMD family 15h
> 
> Robert Richter (2):
>   perf, amd: Rework northbridge event constraints handler
>   perf, amd: Generalize northbridge constraints code for family 15h
> 
>  arch/x86/include/asm/cpufeature.h    |    2 +
>  arch/x86/include/asm/msr-index.h     |    2 +
>  arch/x86/include/asm/perf_event.h    |    6 +
>  arch/x86/kernel/cpu/perf_event.h     |   21 +--
>  arch/x86/kernel/cpu/perf_event_amd.c |  246 ++++++++++++++++++++++++----------
>  5 files changed, 187 insertions(+), 90 deletions(-)
> 
> -- 
> 1.7.9.5
>