* regmap: Question about devices with unequal register sizes
@ 2013-02-16 17:03 Daniel Mack
2013-02-17 16:23 ` Mark Brown
0 siblings, 1 reply; 4+ messages in thread
From: Daniel Mack @ 2013-02-16 17:03 UTC (permalink / raw)
To: Mark Brown; +Cc: LKML, Dimitris Papastamos
Hi Mark and everyone,
I'm writing a driver for an I2C audio codec which has an unusual
register map. The datasheet can be found here:
http://www.ti.com/lit/gpn/tas5086
The register layout is described on page 26, and they call their
registers 'subaddresses'. Up to sub-address 0x1c, I see no problem
mapping that to a simple 8-bit regmap layout, but above that, access
gets trickier because registers change their sizes, which breaks the cache.
So for example, in order to set the 'Downmix input MUX register', the
host is expected to send the sub-address 0x21, followed by 4 consecutive
bytes containing the values. 0x21 is, however, not the correct offset in
the register cache, as 0x20 ('Input MUX register') is also 4 bytes in
size. Higher registers also have to be written in 20 byte blocks.
I thought about registering multiple regmaps with the i2c device, but
that turns out not to play well with ASoC, which always takes the first
regmap for the device.
Are ranges within in the regmap_config what I want here? I haven't yet
figured how to use them accordingly though.
Thanks for sharing any ideas.
Best regards,
Daniel
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: regmap: Question about devices with unequal register sizes
2013-02-16 17:03 regmap: Question about devices with unequal register sizes Daniel Mack
@ 2013-02-17 16:23 ` Mark Brown
2013-05-06 16:32 ` Daniel Mack
0 siblings, 1 reply; 4+ messages in thread
From: Mark Brown @ 2013-02-17 16:23 UTC (permalink / raw)
To: Daniel Mack; +Cc: LKML, Dimitris Papastamos
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On Sat, Feb 16, 2013 at 06:03:51PM +0100, Daniel Mack wrote:
> The register layout is described on page 26, and they call their
> registers 'subaddresses'. Up to sub-address 0x1c, I see no problem
> mapping that to a simple 8-bit regmap layout, but above that, access
> gets trickier because registers change their sizes, which breaks the cache.
The regmap I/O code isn't making any effort to support such devices, the
hardware is just too crazy to worry about. The best you can do is use
the no-bus support and open code your physical I/O so you can still use
the cache.
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: regmap: Question about devices with unequal register sizes
2013-02-17 16:23 ` Mark Brown
@ 2013-05-06 16:32 ` Daniel Mack
2013-05-06 19:36 ` Mark Brown
0 siblings, 1 reply; 4+ messages in thread
From: Daniel Mack @ 2013-05-06 16:32 UTC (permalink / raw)
To: Mark Brown; +Cc: LKML, Dimitris Papastamos
On 17.02.2013 17:23, Mark Brown wrote:
> On Sat, Feb 16, 2013 at 06:03:51PM +0100, Daniel Mack wrote:
>
>> The register layout is described on page 26, and they call their
>> registers 'subaddresses'. Up to sub-address 0x1c, I see no problem
>> mapping that to a simple 8-bit regmap layout, but above that, access
>> gets trickier because registers change their sizes, which breaks the cache.
>
> The regmap I/O code isn't making any effort to support such devices, the
> hardware is just too crazy to worry about. The best you can do is use
> the no-bus support and open code your physical I/O so you can still use
> the cache.
So it turns out I need to write these registers now on the TAS5086
codec, which has such a strange layout. I wonder how I can possibly open
code the physical I/O with registers that are up to 20 bytes in size,
while the reg_write callback in struct regmap_config assumes an unsigned
int suffices for the data? Any example you can point me to?
Thanks,
Daniel
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: regmap: Question about devices with unequal register sizes
2013-05-06 16:32 ` Daniel Mack
@ 2013-05-06 19:36 ` Mark Brown
0 siblings, 0 replies; 4+ messages in thread
From: Mark Brown @ 2013-05-06 19:36 UTC (permalink / raw)
To: Daniel Mack; +Cc: LKML, Dimitris Papastamos
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On Mon, May 06, 2013 at 06:32:12PM +0200, Daniel Mack wrote:
> On 17.02.2013 17:23, Mark Brown wrote:
> > The regmap I/O code isn't making any effort to support such devices, the
> > hardware is just too crazy to worry about. The best you can do is use
> > the no-bus support and open code your physical I/O so you can still use
> > the cache.
> So it turns out I need to write these registers now on the TAS5086
> codec, which has such a strange layout. I wonder how I can possibly open
> code the physical I/O with registers that are up to 20 bytes in size,
> while the reg_write callback in struct regmap_config assumes an unsigned
> int suffices for the data? Any example you can point me to?
There's just no attempt being made in regmap to cater for such devices.
I'm not sure it's worth bothering, sorry, though if you come up with a
non-intrusive way of handling such hardware of course it'd be worth
considering.
Using the no-bus support, having that take a lock and then bypassing it
completely to do the 20 byte writes would probably work.
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^ permalink raw reply [flat|nested] 4+ messages in thread
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