From: Paul Mundt <lethal@linux-sh.org>
To: Magnus Damm <magnus.damm@gmail.com>
Cc: linux-kernel@vger.kernel.org, linux-sh@vger.kernel.org,
benh@kernel.crashing.org, grant.likely@secretlab.ca,
horms@verge.net.au, tglx@linutronix.de
Subject: Re: [PATCH] irqchip: Renesas INTC External IRQ pin driver
Date: Wed, 27 Feb 2013 17:23:38 +0900 [thread overview]
Message-ID: <20130227082335.GB30395@linux-sh.org> (raw)
In-Reply-To: <20130218142834.28739.39417.sendpatchset@w520>
On Mon, Feb 18, 2013 at 11:28:34PM +0900, Magnus Damm wrote:
> From: Magnus Damm <damm@opensource.se>
>
> This patch adds a driver for external IRQ pins connected
> to the INTC block on recent SoCs from Renesas.
>
So how exactly does this interact with the existing sh_intc code? Or is
there some reason why you have opted to bypass it in order to implement a
simplified reduced-functionality version of INTC support focused only on
external pins? If both are used together this is going to be a nightmare
for locking, and it's also non-obvious how the IRQ domains on both sides
will interact.
This needs a lot more explanation.
next prev parent reply other threads:[~2013-02-27 8:24 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-18 14:28 [PATCH] irqchip: Renesas INTC External IRQ pin driver Magnus Damm
2013-02-19 1:03 ` Simon Horman
2013-02-19 10:30 ` Magnus Damm
2013-02-19 1:04 ` Kuninori Morimoto
2013-02-19 10:38 ` Magnus Damm
2013-02-19 10:11 ` Thomas Gleixner
2013-02-19 10:58 ` Magnus Damm
2013-02-19 13:14 ` Thomas Gleixner
2013-02-27 8:23 ` Paul Mundt [this message]
2013-02-27 8:35 ` Magnus Damm
2013-02-27 8:52 ` Paul Mundt
2013-02-27 9:52 ` Magnus Damm
2013-02-27 10:28 ` Paul Mundt
2013-03-06 7:36 ` Magnus Damm
2013-03-06 4:23 ` Simon Horman
2013-03-06 10:01 ` Thomas Gleixner
2013-03-06 11:46 ` Simon Horman
2013-03-06 13:05 ` Thomas Gleixner
2013-03-08 7:25 ` Simon Horman
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