From: Will Deacon <will.deacon@arm.com>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-msm@vger.kernel.org" <linux-arm-msm@vger.kernel.org>,
Stepan Moskovchenko <stepanm@codeaurora.org>
Subject: Re: [PATCH 3/3] ARM: Work around faulty ISAR0 register in some Krait CPUs
Date: Sun, 17 Mar 2013 14:28:54 +0000 [thread overview]
Message-ID: <20130317142854.GC19071@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <1363138321-27849-4-git-send-email-sboyd@codeaurora.org>
On Wed, Mar 13, 2013 at 01:32:01AM +0000, Stephen Boyd wrote:
> Some early versions of the Krait CPU design incorrectly indicate
> that they only support the UDIV and SDIV instructions in Thumb
> mode when they actually support them in ARM and Thumb mode. It
> seems that these CPUs follow the DDI0406B ARM ARM which has two
> possible values for the divide instructions field, instead of the
> DDI0406C document which has three possible values.
>
> Work around this problem by checking the MIDR against Krait CPUs
> with this faulty ISAR0 register and force the detection code
> to indicate support in both modes.
>
> Cc: Will Deacon <will.deacon@arm.com>
> Cc: Stepan Moskovchenko <stepanm@codeaurora.org>
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
> arch/arm/kernel/setup.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
After all this, you might as well just pass the relevant HWCAPs for your
krait entry in proc-v7.S rather than have an exception in the CPU-agnostic
code.
Thanks for adding the detection code though -- we can use that for A7/A15.
Will
next prev parent reply other threads:[~2013-03-17 14:29 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-13 1:31 [PATCH 0/3] Detect UDIV/SDIV support from ISAR0 Stephen Boyd
2013-03-13 1:31 ` [PATCH 1/3] ARM: Clear IDIVT hwcap if CONFIG_ARM_THUMB=n Stephen Boyd
2013-03-17 14:29 ` Will Deacon
2013-03-13 1:32 ` [PATCH 2/3] ARM: Detect support for SDIV/UDIV from ISAR0 register Stephen Boyd
2013-03-17 14:36 ` Will Deacon
2013-03-18 17:13 ` Stephen Boyd
2013-03-13 1:32 ` [PATCH 3/3] ARM: Work around faulty ISAR0 register in some Krait CPUs Stephen Boyd
2013-03-17 14:28 ` Will Deacon [this message]
2013-03-18 17:03 ` Stephen Boyd
2013-03-18 18:19 ` Will Deacon
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