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From: Dave Jiang <dave.jiang@intel.com>
To: djbw@fb.com
Cc: vinod.koul@intel.com, linux-kernel@vger.kernel.org
Subject: [PATCH 01/10] ioatdma: Adding PCI IDs for Intel Atom S1200 product family ioatdma devices
Date: Tue, 26 Mar 2013 15:42:35 -0700	[thread overview]
Message-ID: <20130326224235.15072.60222.stgit@djiang5-linux2.ch.intel.com> (raw)
In-Reply-To: <20130326223953.15072.26605.stgit@djiang5-linux2.ch.intel.com>

These should be good for the IOAT DMA devices on the Intel Atom S1269,
S1279, and S1289 platforms. We are also adding IOAT v3.3 definition for
the new DMA engine.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
 drivers/dma/ioat/hw.h  |    6 ++++++
 drivers/dma/ioat/pci.c |    6 ++++++
 2 files changed, 12 insertions(+)

diff --git a/drivers/dma/ioat/hw.h b/drivers/dma/ioat/hw.h
index 8cfa077..ce431f5 100644
--- a/drivers/dma/ioat/hw.h
+++ b/drivers/dma/ioat/hw.h
@@ -52,10 +52,16 @@
 #define PCI_DEVICE_ID_INTEL_IOAT_HSW8	0x2f2e
 #define PCI_DEVICE_ID_INTEL_IOAT_HSW9	0x2f2f
 
+#define PCI_DEVICE_ID_INTEL_IOAT_BWD0	0x0C50
+#define PCI_DEVICE_ID_INTEL_IOAT_BWD1	0x0C51
+#define PCI_DEVICE_ID_INTEL_IOAT_BWD2	0x0C52
+#define PCI_DEVICE_ID_INTEL_IOAT_BWD3	0x0C53
+
 #define IOAT_VER_1_2            0x12    /* Version 1.2 */
 #define IOAT_VER_2_0            0x20    /* Version 2.0 */
 #define IOAT_VER_3_0            0x30    /* Version 3.0 */
 #define IOAT_VER_3_2            0x32    /* Version 3.2 */
+#define IOAT_VER_3_3            0x33    /* Version 3.3 */
 
 
 int system_has_dca_enabled(struct pci_dev *pdev);
diff --git a/drivers/dma/ioat/pci.c b/drivers/dma/ioat/pci.c
index 67c8e83..1f63296 100644
--- a/drivers/dma/ioat/pci.c
+++ b/drivers/dma/ioat/pci.c
@@ -105,6 +105,12 @@ static struct pci_device_id ioat_pci_tbl[] = {
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW8) },
 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW9) },
 
+	/* I/OAT v3.3 platforms */
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BWD0) },
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BWD1) },
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BWD2) },
+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BWD3) },
+
 	{ 0, }
 };
 MODULE_DEVICE_TABLE(pci, ioat_pci_tbl);


  reply	other threads:[~2013-03-26 22:42 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-26 22:42 [PATCH 00/10] Add Intel Atom S1200 seris ioatdma support Dave Jiang
2013-03-26 22:42 ` Dave Jiang [this message]
2013-03-26 22:42 ` [PATCH 02/10] ioatdma: Add 64bit chansts register read for ioat v3.3 Dave Jiang
2013-03-26 22:42 ` [PATCH 03/10] ioatdma: channel reset scheme fixup on Intel Atom S1200 platforms Dave Jiang
2013-03-26 22:42 ` [PATCH 04/10] ioatdma: Removing hw bug workaround for CB3.x .2 and earlier Dave Jiang
2013-03-26 22:42 ` [PATCH 05/10] ioatdma: skip legacy reset bits since v3.3 plattform doesn't need it Dave Jiang
2013-03-26 22:43 ` [PATCH 06/10] ioatdma: Removing PQ val disable for cb3.3 Dave Jiang
2013-03-27 18:48   ` Dan Williams
2013-03-29 17:31     ` Dave Jiang
2013-03-26 22:43 ` [PATCH 07/10] ioatdma: skip silicon bug workaround for pq_align " Dave Jiang
2013-03-26 22:43 ` [PATCH 08/10] ioatdma: Adding support for 16 src PQ ops and super extended descriptors Dave Jiang
2013-03-26 22:43 ` [PATCH 09/10] ioatdma: Adding write back descriptor error status support for ioatdma 3.3 Dave Jiang
2013-03-26 23:47   ` Dan Williams
2013-03-26 23:55     ` Dave Jiang
2013-03-28 22:25     ` [PATCH 09/10 v2] " Jiang, Dave
2013-03-26 22:43 ` [PATCH 10/10] ioatdma: S1200 platforms ioatdma channel 2 and 3 falsely advertise RAID cap Dave Jiang
2013-04-09  7:28 ` [PATCH 00/10] Add Intel Atom S1200 seris ioatdma support Vinod Koul
2013-04-10  0:56   ` Dan Williams
     [not found]   ` <CAA9_cmftcvYN_g0Sj12tMa4T8LxbPdk6wDxwkbTrgQPUUfc0FA@mail.gmail.com>
2013-04-10  5:00     ` Vinod Koul
2013-04-10  5:10       ` Vinod Koul
2013-04-10  5:33       ` Jiang, Dave

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