Re: [PATCH 2/5] perf, x86: AMD implementation for hardware breakpoint address mask

[Jacob Shin <jacob.shin@amd.com>]

On Sun, Apr 21, 2013 at 07:19:21PM +0200, Oleg Nesterov wrote:
> Not a comment, but the question...
> 
> On 04/09, Jacob Shin wrote:
> >
> > --- a/arch/x86/include/asm/hw_breakpoint.h
> > +++ b/arch/x86/include/asm/hw_breakpoint.h
> > @@ -14,6 +14,7 @@ struct arch_hw_breakpoint {
> >  	unsigned long	address;
> >  	u8		len;
> >  	u8		type;
> > +	u32		mask;
> >  };
> ...
> > @@ -254,6 +258,7 @@ static int arch_build_bp_info(struct perf_event *bp)
> >  	struct arch_hw_breakpoint *info = counter_arch_bp(bp);
> >
> >  	info->address = bp->attr.bp_addr;
> > +	info->mask = bp->attr.bp_addr_mask;
> 
> OK, this matches the usage of info->address so I think this change
> is right.
> 
> But otoh, why do we need info->address (or mask added by this patch)?
> we could use bp->attr.bp_addr instead. arch_hw_breakpoint could have
> a single filed = "type | len" for encode_dr7().

I understood this as maybe remapping arch independant uapi struct into
x86 specific struct. I guess to future proof in cause uapi interfaces
change.

> 
> Yes, off-topic, sorry for noise.
> 
> Oleg.
> 
>