Re: Fwd: [GIT PULL] timer changes for v3.10

[Feng Tang <feng.tang@intel.com>]

Hi Ingo,

On Tue, May 07, 2013 at 08:53:48AM +0200, Ingo Molnar wrote:
> 
> * Feng Tang <feng.tang@intel.com> wrote:
> 
> > > is even worse than that. Machine can stay is s2ram for weeks (for a 
> > > lot more if it is desktop and you do s2ram for powersaving). Also 
> > > temperature of CPU varies a lot between active and s2ram states. Is 
> > > TSC good enough?
> > 
> > Yes, I think it is relatively precise. Per our test, system time backed 
> > by the S3 non stop TSC only has 1 second drift after 4 days running 
> > (with mixed running and S3 states). And before using this feature, we've 
> > seen many time drift problems due to the RTC HW or system FW with our 
> > platforms.
> 
> Nice result ...
> 
> Is that with NTP running?

No, we haven't tested it with NTP yet.

> 
> Without NTP, the TSC fast-calibration on bootup is not (expected to be) 
> nearly as precise as the 1:345600 precision you've measured.

For the some Atom processor like the Moorestown, Medfield, we use a
fast TSC calibration by check the FSB freq and ratio from MSRs. See
mrst_calibrate_tsc() in arch/x86/platform/mrst/mrst.c, and the calculated
value is precise based on our test.

Thanks,
Feng