From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
stable@vger.kernel.org, Alex Deucher <alexander.deucher@amd.com>
Subject: [ 16/26] drm/radeon: properly lock disp in mc_stop/resume for evergreen+
Date: Thu, 9 May 2013 15:34:30 -0700 [thread overview]
Message-ID: <20130509223424.139429000@linuxfoundation.org> (raw)
In-Reply-To: <20130509223422.368544659@linuxfoundation.org>
3.4-stable review patch. If anyone has any objections, please let me know.
------------------
From: Alex Deucher <alexander.deucher@amd.com>
commit 968c01664ccbe0e46c19a1af662c4c266a904203 upstream.
Need to wait for the new addresses to take affect before
re-enabling the MC.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
drivers/gpu/drm/radeon/evergreen.c | 47 ++++++++++++++++++++++++++++++---
drivers/gpu/drm/radeon/evergreen_reg.h | 2 +
2 files changed, 45 insertions(+), 4 deletions(-)
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1147,18 +1147,14 @@ void evergreen_mc_stop(struct radeon_dev
if (!(tmp & EVERGREEN_CRTC_BLANK_DATA_EN)) {
radeon_wait_for_vblank(rdev, i);
tmp |= EVERGREEN_CRTC_BLANK_DATA_EN;
- WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp);
- WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
}
} else {
tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);
if (!(tmp & EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE)) {
radeon_wait_for_vblank(rdev, i);
tmp |= EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE;
- WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);
- WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
}
}
/* wait for the next frame */
@@ -1185,6 +1181,22 @@ void evergreen_mc_stop(struct radeon_dev
}
/* wait for the MC to settle */
udelay(100);
+
+ /* lock double buffered regs */
+ for (i = 0; i < rdev->num_crtc; i++) {
+ if (save->crtc_enabled[i]) {
+ tmp = RREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i]);
+ if (!(tmp & EVERGREEN_GRPH_UPDATE_LOCK)) {
+ tmp |= EVERGREEN_GRPH_UPDATE_LOCK;
+ WREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i], tmp);
+ }
+ tmp = RREG32(EVERGREEN_MASTER_UPDATE_LOCK + crtc_offsets[i]);
+ if (!(tmp & 1)) {
+ tmp |= 1;
+ WREG32(EVERGREEN_MASTER_UPDATE_LOCK + crtc_offsets[i], tmp);
+ }
+ }
+ }
}
void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *save)
@@ -1206,6 +1218,33 @@ void evergreen_mc_resume(struct radeon_d
WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH, upper_32_bits(rdev->mc.vram_start));
WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start);
+ /* unlock regs and wait for update */
+ for (i = 0; i < rdev->num_crtc; i++) {
+ if (save->crtc_enabled[i]) {
+ tmp = RREG32(EVERGREEN_MASTER_UPDATE_MODE + crtc_offsets[i]);
+ if ((tmp & 0x3) != 0) {
+ tmp &= ~0x3;
+ WREG32(EVERGREEN_MASTER_UPDATE_MODE + crtc_offsets[i], tmp);
+ }
+ tmp = RREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i]);
+ if (tmp & EVERGREEN_GRPH_UPDATE_LOCK) {
+ tmp &= ~EVERGREEN_GRPH_UPDATE_LOCK;
+ WREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i], tmp);
+ }
+ tmp = RREG32(EVERGREEN_MASTER_UPDATE_LOCK + crtc_offsets[i]);
+ if (tmp & 1) {
+ tmp &= ~1;
+ WREG32(EVERGREEN_MASTER_UPDATE_LOCK + crtc_offsets[i], tmp);
+ }
+ for (j = 0; j < rdev->usec_timeout; j++) {
+ tmp = RREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i]);
+ if ((tmp & EVERGREEN_GRPH_SURFACE_UPDATE_PENDING) == 0)
+ break;
+ udelay(1);
+ }
+ }
+ }
+
/* unblackout the MC */
tmp = RREG32(MC_SHARED_BLACKOUT_CNTL);
tmp &= ~BLACKOUT_MODE_MASK;
--- a/drivers/gpu/drm/radeon/evergreen_reg.h
+++ b/drivers/gpu/drm/radeon/evergreen_reg.h
@@ -225,6 +225,8 @@
#define EVERGREEN_CRTC_STATUS_POSITION 0x6e90
#define EVERGREEN_MASTER_UPDATE_MODE 0x6ef8
#define EVERGREEN_CRTC_UPDATE_LOCK 0x6ed4
+#define EVERGREEN_MASTER_UPDATE_LOCK 0x6ef4
+#define EVERGREEN_MASTER_UPDATE_MODE 0x6ef8
#define EVERGREEN_DC_GPIO_HPD_MASK 0x64b0
#define EVERGREEN_DC_GPIO_HPD_A 0x64b4
next prev parent reply other threads:[~2013-05-09 22:42 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-09 22:34 [ 00/26] 3.4.45-stable review Greg Kroah-Hartman
2013-05-09 22:34 ` [ 01/26] powerpc: Emulate non privileged DSCR read and write Greg Kroah-Hartman
2013-05-09 22:34 ` [ 02/26] powerpc: fix numa distance for form0 device tree Greg Kroah-Hartman
2013-05-09 22:34 ` [ 03/26] autofs - remove autofs dentry mount check Greg Kroah-Hartman
2013-05-09 22:34 ` [ 04/26] net/eth/ibmveth: Fixup retrieval of MAC address Greg Kroah-Hartman
2013-05-09 22:34 ` [ 05/26] perf/x86/intel/lbr: Fix LBR filter Greg Kroah-Hartman
2013-05-09 22:34 ` [ 06/26] perf/x86/intel/lbr: Demand proper privileges for PERF_SAMPLE_BRANCH_KERNEL Greg Kroah-Hartman
2013-05-09 22:34 ` [ 07/26] xhci: Dont warn on empty ring for suspended devices Greg Kroah-Hartman
2013-05-09 22:34 ` [ 08/26] ipvs: ip_vs_sip_fill_param() BUG: bad check of return value Greg Kroah-Hartman
2013-05-09 22:34 ` [ 09/26] ext4: add check for inodes_count overflow in new resize ioctl Greg Kroah-Hartman
2013-05-09 22:34 ` [ 10/26] r8169: fix 8168evl frame padding Greg Kroah-Hartman
2013-05-09 22:34 ` [ 11/26] cpufreq / Longhaul: Disable driver by default Greg Kroah-Hartman
2013-05-09 22:34 ` [ 12/26] drm/i915: Add no-lvds quirk for Fujitsu Esprimo Q900 Greg Kroah-Hartman
2013-05-09 22:34 ` [ 13/26] drm/i915: Fall back to bit banging mode for DVO transmitter detection Greg Kroah-Hartman
2013-05-09 22:34 ` [ 14/26] drm/radeon: dont use get_engine_clock() on APUs Greg Kroah-Hartman
2013-05-09 22:34 ` [ 15/26] drm/radeon/dce6: add missing display reg for tiling setup Greg Kroah-Hartman
2013-05-09 22:34 ` Greg Kroah-Hartman [this message]
2013-05-09 22:34 ` [ 17/26] drm/radeon: disable the crtcs in mc_stop (evergreen+) (v2) Greg Kroah-Hartman
2013-05-09 22:34 ` [ 18/26] drm/radeon: add some new SI PCI ids Greg Kroah-Hartman
2013-05-09 22:34 ` [ 19/26] drm/radeon/evergreen+: dont enable HPD interrupts on eDP/LVDS Greg Kroah-Hartman
2013-05-09 22:34 ` [ 20/26] drm/radeon: fix endian bugs in atom_allocate_fb_scratch() Greg Kroah-Hartman
2013-05-09 22:34 ` [ 21/26] drm/radeon: fix possible segfault when parsing pm tables Greg Kroah-Hartman
2013-05-09 22:34 ` [ 22/26] drm/radeon: add new richland pci ids Greg Kroah-Hartman
2013-05-09 22:34 ` [ 23/26] drm/radeon: fix handling of v6 power tables Greg Kroah-Hartman
2013-05-09 22:34 ` [ 24/26] tracing: Fix ftrace_dump() Greg Kroah-Hartman
2013-05-09 22:34 ` [ 25/26] kernel/audit_tree.c: tree will leak memory when failure occurs in audit_trim_trees() Greg Kroah-Hartman
2013-05-09 22:34 ` [ 26/26] x86/mm: account for PGDIR_SIZE alignment Greg Kroah-Hartman
2013-05-10 15:25 ` [ 00/26] 3.4.45-stable review Shuah Khan
2013-05-11 5:20 ` Satoru Takeuchi
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