From: Tejun Heo <tj@kernel.org>
To: chew chiau ee <chiauee85@gmail.com>
Cc: Jeff Garzik <jgarzik@pobox.com>,
linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org,
Artem Bityutskiy <artem.bityutskiy@linux.intel.com>,
Chew Chiau Ee <chiau.ee.chew@intel.com>
Subject: Re: [PATCH] ata_piix: add PCI IDs for Intel BayTail
Date: Thu, 30 May 2013 16:03:23 +0900 [thread overview]
Message-ID: <20130530070323.GD22604@mtj.dyndns.org> (raw)
In-Reply-To: <CAA9G2fWUZy3-QDMjGm2vZkZfoyvKiQO-kM3-6jHNUiQ62tHXVA@mail.gmail.com>
On Thu, May 30, 2013 at 03:02:41PM +0800, chew chiau ee wrote:
> Baytrail supports only two SATA ports.
> Baytrail is using the mapping table of ich8_2port_map_db while SNB is
> using mapping table of ich8_map_db.
Ah, alright. Thanks for the explanation. :)
--
tejun
prev parent reply other threads:[~2013-05-30 7:03 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-16 7:33 [PATCH] ata_piix: add PCI IDs for Intel BayTail Chew Chiau Ee
2013-05-16 18:07 ` Tejun Heo
2013-05-16 18:18 ` Tejun Heo
[not found] ` <CAA9G2fWUZy3-QDMjGm2vZkZfoyvKiQO-kM3-6jHNUiQ62tHXVA@mail.gmail.com>
2013-05-30 7:03 ` Tejun Heo [this message]
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