* [PATCH] ata_piix: add PCI IDs for Intel BayTail
@ 2013-05-16 7:33 Chew Chiau Ee
2013-05-16 18:07 ` Tejun Heo
0 siblings, 1 reply; 4+ messages in thread
From: Chew Chiau Ee @ 2013-05-16 7:33 UTC (permalink / raw)
To: Jeff Garzik; +Cc: linux-ide, linux-kernel, Artem Bityutskiy, Chew Chiau Ee
From: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Adds IDE-mode SATA Device IDs for the Intel BayTrail platform.
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
---
drivers/ata/ata_piix.c | 15 +++++++++++++++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 2f48123..93cb092 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -151,6 +151,7 @@ enum piix_controller_ids {
piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */
ich8_sata_snb,
ich8_2port_sata_snb,
+ ich8_2port_sata_byt,
};
struct piix_map_db {
@@ -334,6 +335,9 @@ static const struct pci_device_id piix_pci_tbl[] = {
{ 0x8086, 0x8d60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
/* SATA Controller IDE (Wellsburg) */
{ 0x8086, 0x8d68, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
+ /* SATA Controller IDE (BayTrail) */
+ { 0x8086, 0x0F20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
+ { 0x8086, 0x0F21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
{ } /* terminate list */
};
@@ -441,6 +445,7 @@ static const struct piix_map_db *piix_map_db_table[] = {
[tolapai_sata] = &tolapai_map_db,
[ich8_sata_snb] = &ich8_map_db,
[ich8_2port_sata_snb] = &ich8_2port_map_db,
+ [ich8_2port_sata_byt] = &ich8_2port_map_db,
};
static struct pci_bits piix_enable_bits[] = {
@@ -1254,6 +1259,16 @@ static struct ata_port_info piix_port_info[] = {
.udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops,
},
+
+ [ich8_2port_sata_byt] =
+ {
+ .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR | PIIX_FLAG_PIO16,
+ .pio_mask = ATA_PIO4,
+ .mwdma_mask = ATA_MWDMA2,
+ .udma_mask = ATA_UDMA6,
+ .port_ops = &piix_sata_ops,
+ },
+
};
#define AHCI_PCI_BAR 5
--
1.7.4.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] ata_piix: add PCI IDs for Intel BayTail
2013-05-16 7:33 [PATCH] ata_piix: add PCI IDs for Intel BayTail Chew Chiau Ee
@ 2013-05-16 18:07 ` Tejun Heo
2013-05-16 18:18 ` Tejun Heo
0 siblings, 1 reply; 4+ messages in thread
From: Tejun Heo @ 2013-05-16 18:07 UTC (permalink / raw)
To: Chew Chiau Ee
Cc: Jeff Garzik, linux-ide, linux-kernel, Artem Bityutskiy,
Chew Chiau Ee
On Thu, May 16, 2013 at 03:33:29PM +0800, Chew Chiau Ee wrote:
> From: Chew, Chiau Ee <chiau.ee.chew@intel.com>
>
> Adds IDE-mode SATA Device IDs for the Intel BayTrail platform.
>
> Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Applied to libata/for-3.10-fixes w/ stable cc added.
Thanks.
--
tejun
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] ata_piix: add PCI IDs for Intel BayTail
2013-05-16 18:07 ` Tejun Heo
@ 2013-05-16 18:18 ` Tejun Heo
[not found] ` <CAA9G2fWUZy3-QDMjGm2vZkZfoyvKiQO-kM3-6jHNUiQ62tHXVA@mail.gmail.com>
0 siblings, 1 reply; 4+ messages in thread
From: Tejun Heo @ 2013-05-16 18:18 UTC (permalink / raw)
To: Chew Chiau Ee
Cc: Jeff Garzik, linux-ide, linux-kernel, Artem Bityutskiy,
Chew Chiau Ee
On Thu, May 16, 2013 at 11:07:28AM -0700, Tejun Heo wrote:
> On Thu, May 16, 2013 at 03:33:29PM +0800, Chew Chiau Ee wrote:
> > From: Chew, Chiau Ee <chiau.ee.chew@intel.com>
> >
> > Adds IDE-mode SATA Device IDs for the Intel BayTrail platform.
> >
> > Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
> > Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
>
> Applied to libata/for-3.10-fixes w/ stable cc added.
BTW, why is it creating a new entry? Is there any difference with
snb?
Thanks.
--
tejun
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] ata_piix: add PCI IDs for Intel BayTail
[not found] ` <CAA9G2fWUZy3-QDMjGm2vZkZfoyvKiQO-kM3-6jHNUiQ62tHXVA@mail.gmail.com>
@ 2013-05-30 7:03 ` Tejun Heo
0 siblings, 0 replies; 4+ messages in thread
From: Tejun Heo @ 2013-05-30 7:03 UTC (permalink / raw)
To: chew chiau ee
Cc: Jeff Garzik, linux-ide, linux-kernel, Artem Bityutskiy,
Chew Chiau Ee
On Thu, May 30, 2013 at 03:02:41PM +0800, chew chiau ee wrote:
> Baytrail supports only two SATA ports.
> Baytrail is using the mapping table of ich8_2port_map_db while SNB is
> using mapping table of ich8_map_db.
Ah, alright. Thanks for the explanation. :)
--
tejun
^ permalink raw reply [flat|nested] 4+ messages in thread
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2013-05-16 7:33 [PATCH] ata_piix: add PCI IDs for Intel BayTail Chew Chiau Ee
2013-05-16 18:07 ` Tejun Heo
2013-05-16 18:18 ` Tejun Heo
[not found] ` <CAA9G2fWUZy3-QDMjGm2vZkZfoyvKiQO-kM3-6jHNUiQ62tHXVA@mail.gmail.com>
2013-05-30 7:03 ` Tejun Heo
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