* [PATCH v3] x86: make sure IDT is page aligned
@ 2013-07-12 22:50 Kees Cook
2013-07-13 3:21 ` [tip:x86/urgent] x86: Make " tip-bot for Kees Cook
0 siblings, 1 reply; 6+ messages in thread
From: Kees Cook @ 2013-07-12 22:50 UTC (permalink / raw)
To: linux-kernel
Cc: Thomas Gleixner, Ingo Molnar, H. Peter Anvin, x86, Yinghai Lu,
Seiji Aguchi, Fenghua Yu, Kees Cook, Frederic Weisbecker,
Paul E. McKenney, Suresh Siddha, PaX Team
Since the IDT is referenced from a fixmap, make sure it is page aligned.
Merge with 32-bit one, since it was already aligned to deal with F00F bug.
This avoids the risk of it ever being moved in the bss and having the
mapping be offset, resulting in calling incorrect handlers.
Signed-off-by: Kees Cook <keescook@chromium.org>
Reported-by: PaX Team <pageexec@gmail.com>
Cc: stable@vger.kernel.org
---
v3:
- merge 32-bit and 64-bit idt_table definition
v2:
- 32-bit was already aligned
---
arch/x86/kernel/head_64.S | 4 ----
arch/x86/kernel/traps.c | 7 ++-----
2 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 5e4d8a8..317b8cc 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -514,10 +514,6 @@ ENTRY(phys_base)
.section .bss, "aw", @nobits
.align L1_CACHE_BYTES
-ENTRY(idt_table)
- .skip IDT_ENTRIES * 16
-
- .align L1_CACHE_BYTES
ENTRY(debug_idt_table)
.skip IDT_ENTRIES * 16
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index b0865e8..0952614 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -68,13 +68,10 @@
#include <asm/setup.h>
asmlinkage int system_call(void);
+#endif
-/*
- * The IDT has to be page-aligned to simplify the Pentium
- * F0 0F bug workaround.
- */
+/* The IDT has to be page-aligned to keep it aligned with its fixmap. */
gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
-#endif
DECLARE_BITMAP(used_vectors, NR_VECTORS);
EXPORT_SYMBOL_GPL(used_vectors);
--
1.7.9.5
--
Kees Cook
Chrome OS Security
^ permalink raw reply related [flat|nested] 6+ messages in thread* [tip:x86/urgent] x86: Make sure IDT is page aligned
2013-07-12 22:50 [PATCH v3] x86: make sure IDT is page aligned Kees Cook
@ 2013-07-13 3:21 ` tip-bot for Kees Cook
2013-07-13 20:39 ` Yinghai Lu
2013-07-13 21:34 ` Yinghai Lu
0 siblings, 2 replies; 6+ messages in thread
From: tip-bot for Kees Cook @ 2013-07-13 3:21 UTC (permalink / raw)
To: linux-tip-commits; +Cc: linux-kernel, hpa, mingo, keescook, pageexec, tglx, hpa
Commit-ID: c0b3450f101523a49823fa93d155f1d258e5ac6f
Gitweb: http://git.kernel.org/tip/c0b3450f101523a49823fa93d155f1d258e5ac6f
Author: Kees Cook <keescook@chromium.org>
AuthorDate: Fri, 12 Jul 2013 15:50:17 -0700
Committer: H. Peter Anvin <hpa@linux.intel.com>
CommitDate: Fri, 12 Jul 2013 16:14:08 -0700
x86: Make sure IDT is page aligned
Since the IDT is referenced from a fixmap, make sure it is page aligned.
Merge with 32-bit one, since it was already aligned to deal with F00F bug.
This avoids the risk of it ever being moved in the bss and having the
mapping be offset, resulting in calling incorrect handlers.
[ hpa: It isn't clear that this is a manifest bug in any way, but
tagging for -stable because it shouldn't hurt and might avoid some
very hard-to-debug breakages due to unrelated changes. ]
Signed-off-by: Kees Cook <keescook@chromium.org>
Link: http://lkml.kernel.org/r/20130712225017.GA5366@www.outflux.net
Reported-by: PaX Team <pageexec@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
---
arch/x86/kernel/head_64.S | 4 ----
arch/x86/kernel/traps.c | 7 ++-----
2 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 5e4d8a8..317b8cc 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -514,10 +514,6 @@ ENTRY(phys_base)
.section .bss, "aw", @nobits
.align L1_CACHE_BYTES
-ENTRY(idt_table)
- .skip IDT_ENTRIES * 16
-
- .align L1_CACHE_BYTES
ENTRY(debug_idt_table)
.skip IDT_ENTRIES * 16
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index b0865e8..0952614 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -68,13 +68,10 @@
#include <asm/setup.h>
asmlinkage int system_call(void);
+#endif
-/*
- * The IDT has to be page-aligned to simplify the Pentium
- * F0 0F bug workaround.
- */
+/* The IDT has to be page-aligned to keep it aligned with its fixmap. */
gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
-#endif
DECLARE_BITMAP(used_vectors, NR_VECTORS);
EXPORT_SYMBOL_GPL(used_vectors);
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [tip:x86/urgent] x86: Make sure IDT is page aligned
2013-07-13 3:21 ` [tip:x86/urgent] x86: Make " tip-bot for Kees Cook
@ 2013-07-13 20:39 ` Yinghai Lu
2013-07-13 21:34 ` Yinghai Lu
1 sibling, 0 replies; 6+ messages in thread
From: Yinghai Lu @ 2013-07-13 20:39 UTC (permalink / raw)
To: Ingo Molnar, H. Peter Anvin, Linux Kernel Mailing List, Kees Cook,
pageexec, Thomas Gleixner, H. Peter Anvin
Cc: linux-tip-commits@vger.kernel.org
On Fri, Jul 12, 2013 at 8:21 PM, tip-bot for Kees Cook <tipbot@zytor.com> wrote:
> Commit-ID: c0b3450f101523a49823fa93d155f1d258e5ac6f
> Gitweb: http://git.kernel.org/tip/c0b3450f101523a49823fa93d155f1d258e5ac6f
> Author: Kees Cook <keescook@chromium.org>
> AuthorDate: Fri, 12 Jul 2013 15:50:17 -0700
> Committer: H. Peter Anvin <hpa@linux.intel.com>
> CommitDate: Fri, 12 Jul 2013 16:14:08 -0700
>
> x86: Make sure IDT is page aligned
>
> Since the IDT is referenced from a fixmap, make sure it is page aligned.
> Merge with 32-bit one, since it was already aligned to deal with F00F bug.
> This avoids the risk of it ever being moved in the bss and having the
> mapping be offset, resulting in calling incorrect handlers.
>
> [ hpa: It isn't clear that this is a manifest bug in any way, but
> tagging for -stable because it shouldn't hurt and might avoid some
> very hard-to-debug breakages due to unrelated changes. ]
>
> Signed-off-by: Kees Cook <keescook@chromium.org>
> Link: http://lkml.kernel.org/r/20130712225017.GA5366@www.outflux.net
> Reported-by: PaX Team <pageexec@gmail.com>
> Cc: stable@vger.kernel.org
> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
> ---
> arch/x86/kernel/head_64.S | 4 ----
> arch/x86/kernel/traps.c | 7 ++-----
> 2 files changed, 2 insertions(+), 9 deletions(-)
>
> diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
> index 5e4d8a8..317b8cc 100644
> --- a/arch/x86/kernel/head_64.S
> +++ b/arch/x86/kernel/head_64.S
> @@ -514,10 +514,6 @@ ENTRY(phys_base)
>
> .section .bss, "aw", @nobits
> .align L1_CACHE_BYTES
> -ENTRY(idt_table)
> - .skip IDT_ENTRIES * 16
> -
> - .align L1_CACHE_BYTES
> ENTRY(debug_idt_table)
> .skip IDT_ENTRIES * 16
>
> diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
> index b0865e8..0952614 100644
> --- a/arch/x86/kernel/traps.c
> +++ b/arch/x86/kernel/traps.c
> @@ -68,13 +68,10 @@
> #include <asm/setup.h>
>
> asmlinkage int system_call(void);
> +#endif
>
> -/*
> - * The IDT has to be page-aligned to simplify the Pentium
> - * F0 0F bug workaround.
> - */
> +/* The IDT has to be page-aligned to keep it aligned with its fixmap. */
> gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
> -#endif
>
> DECLARE_BITMAP(used_vectors, NR_VECTORS);
> EXPORT_SYMBOL_GPL(used_vectors);
arch/x86/kernel/traps.c:74:1: warning: braces around scalar
initializer [enabled by default]
arch/x86/kernel/traps.c:74:1: warning: (near initialization for
‘idt_table[0].offset_low’) [enabled by default]
arch/x86/kernel/traps.c:74:1: warning: braces around scalar
initializer [enabled by default]
arch/x86/kernel/traps.c:74:1: warning: (near initialization for
‘idt_table[0].offset_low’) [enabled by default]
arch/x86/kernel/traps.c:74:1: warning: excess elements in scalar
initializer [enabled by default]
arch/x86/kernel/traps.c:74:1: warning: (near initialization for
‘idt_table[0].offset_low’) [enabled by default]
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [tip:x86/urgent] x86: Make sure IDT is page aligned
2013-07-13 3:21 ` [tip:x86/urgent] x86: Make " tip-bot for Kees Cook
2013-07-13 20:39 ` Yinghai Lu
@ 2013-07-13 21:34 ` Yinghai Lu
2013-07-15 18:09 ` H. Peter Anvin
1 sibling, 1 reply; 6+ messages in thread
From: Yinghai Lu @ 2013-07-13 21:34 UTC (permalink / raw)
To: Ingo Molnar, H. Peter Anvin, Linux Kernel Mailing List, Kees Cook,
pageexec, Thomas Gleixner, H. Peter Anvin
Cc: linux-tip-commits@vger.kernel.org
On Fri, Jul 12, 2013 at 8:21 PM, tip-bot for Kees Cook <tipbot@zytor.com> wrote:
> Commit-ID: c0b3450f101523a49823fa93d155f1d258e5ac6f
> Gitweb: http://git.kernel.org/tip/c0b3450f101523a49823fa93d155f1d258e5ac6f
> Author: Kees Cook <keescook@chromium.org>
> AuthorDate: Fri, 12 Jul 2013 15:50:17 -0700
> Committer: H. Peter Anvin <hpa@linux.intel.com>
> CommitDate: Fri, 12 Jul 2013 16:14:08 -0700
>
> x86: Make sure IDT is page aligned
>
> Since the IDT is referenced from a fixmap, make sure it is page aligned.
> Merge with 32-bit one, since it was already aligned to deal with F00F bug.
> This avoids the risk of it ever being moved in the bss and having the
> mapping be offset, resulting in calling incorrect handlers.
why can put idt_table not be in .bss?
>
> [ hpa: It isn't clear that this is a manifest bug in any way, but
> tagging for -stable because it shouldn't hurt and might avoid some
> very hard-to-debug breakages due to unrelated changes. ]
>
> Signed-off-by: Kees Cook <keescook@chromium.org>
> Link: http://lkml.kernel.org/r/20130712225017.GA5366@www.outflux.net
> Reported-by: PaX Team <pageexec@gmail.com>
> Cc: stable@vger.kernel.org
> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
> ---
> arch/x86/kernel/head_64.S | 4 ----
> arch/x86/kernel/traps.c | 7 ++-----
> 2 files changed, 2 insertions(+), 9 deletions(-)
>
> diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
> index 5e4d8a8..317b8cc 100644
> --- a/arch/x86/kernel/head_64.S
> +++ b/arch/x86/kernel/head_64.S
> @@ -514,10 +514,6 @@ ENTRY(phys_base)
>
> .section .bss, "aw", @nobits
> .align L1_CACHE_BYTES
> -ENTRY(idt_table)
> - .skip IDT_ENTRIES * 16
> -
> - .align L1_CACHE_BYTES
> ENTRY(debug_idt_table)
> .skip IDT_ENTRIES * 16
>
> diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
> index b0865e8..0952614 100644
> --- a/arch/x86/kernel/traps.c
> +++ b/arch/x86/kernel/traps.c
> @@ -68,13 +68,10 @@
> #include <asm/setup.h>
>
> asmlinkage int system_call(void);
> +#endif
>
> -/*
> - * The IDT has to be page-aligned to simplify the Pentium
> - * F0 0F bug workaround.
> - */
> +/* The IDT has to be page-aligned to keep it aligned with its fixmap. */
> gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
> -#endif
can we use put all idt_table related in to __bss.aligned section ...?
like
gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
>
> DECLARE_BITMAP(used_vectors, NR_VECTORS);
> EXPORT_SYMBOL_GPL(used_vectors);
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [tip:x86/urgent] x86: Make sure IDT is page aligned
2013-07-13 21:34 ` Yinghai Lu
@ 2013-07-15 18:09 ` H. Peter Anvin
2013-07-15 18:37 ` Kees Cook
0 siblings, 1 reply; 6+ messages in thread
From: H. Peter Anvin @ 2013-07-15 18:09 UTC (permalink / raw)
To: Kees Cook
Cc: Yinghai Lu, Ingo Molnar, Linux Kernel Mailing List, pageexec,
Thomas Gleixner, H. Peter Anvin,
linux-tip-commits@vger.kernel.org
On 07/13/2013 02:34 PM, Yinghai Lu wrote:
>
> can we use put all idt_table related in to __bss.aligned section ...?
>
> like
> gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
>
I think this is the best solution all around... it not only solves the
initializer problem but also reduces the size of data.
A long, long time ago in a galaxy far, far away I believe the IDT got
set up before we cleared bss, but that is no longer the case as we now
clear bss very, very early (on 32 bits before paging is even enabled.)
Still, it would seem that the minimal solution, if we need something for
3.11/stable, is to simply fix the alignment statement in head_64.S
(optionally move to .bss..page_aligned) and then do the proper cleanup
for 3.12. If you could prepare a patch for the former (please include
the descriptions we discussed over IRC) and a patchset for the latter it
would be good.
Thanks,
-hpa
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [tip:x86/urgent] x86: Make sure IDT is page aligned
2013-07-15 18:09 ` H. Peter Anvin
@ 2013-07-15 18:37 ` Kees Cook
0 siblings, 0 replies; 6+ messages in thread
From: Kees Cook @ 2013-07-15 18:37 UTC (permalink / raw)
To: H. Peter Anvin
Cc: Yinghai Lu, Ingo Molnar, Linux Kernel Mailing List, pageexec,
Thomas Gleixner, H. Peter Anvin,
linux-tip-commits@vger.kernel.org
Hi,
On Mon, Jul 15, 2013 at 11:09 AM, H. Peter Anvin <hpa@zytor.com> wrote:
> On 07/13/2013 02:34 PM, Yinghai Lu wrote:
>>
>> can we use put all idt_table related in to __bss.aligned section ...?
>>
>> like
>> gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
>>
>
> I think this is the best solution all around... it not only solves the
> initializer problem but also reduces the size of data.
>
> A long, long time ago in a galaxy far, far away I believe the IDT got
> set up before we cleared bss, but that is no longer the case as we now
> clear bss very, very early (on 32 bits before paging is even enabled.)
>
> Still, it would seem that the minimal solution, if we need something for
> 3.11/stable, is to simply fix the alignment statement in head_64.S
> (optionally move to .bss..page_aligned) and then do the proper cleanup
> for 3.12. If you could prepare a patch for the former (please include
> the descriptions we discussed over IRC) and a patchset for the latter it
> would be good.
Sorry for the trouble I caused on this. I've reorganized how I do test
builds now, which should hopefully cut down on my stupid mistakes.
I'll send two patches, one for 3.11/stable with the absolute minimal
change to alignment, and another for 3.12 that moves all the IDT
variables into common places using __page_aligned_bss as Yinghai Lu
recommended.
Thanks,
-Kees
--
Kees Cook
Chrome OS Security
^ permalink raw reply [flat|nested] 6+ messages in thread
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2013-07-12 22:50 [PATCH v3] x86: make sure IDT is page aligned Kees Cook
2013-07-13 3:21 ` [tip:x86/urgent] x86: Make " tip-bot for Kees Cook
2013-07-13 20:39 ` Yinghai Lu
2013-07-13 21:34 ` Yinghai Lu
2013-07-15 18:09 ` H. Peter Anvin
2013-07-15 18:37 ` Kees Cook
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