[PATCH] amd64_edac: Correct erratum 505 range

[PATCH] amd64_edac: Correct erratum 505 range

[Borislav Petkov]

Basically we want to cover all 0x0-0xf models, i.e. Orochi and later.

Cc: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Link: http://lkml.kernel.org/r/20130819192321.GF4165@pd.tnic
Signed-off-by: Borislav Petkov <bp@suse.de>
---

Hey guys,

I've got one more patch which needs to go to tip/x86/ras for 3.12. It
was not worth it IMO to send a pull request for a single patch so please
apply.

Thanks.

 drivers/edac/amd64_edac.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index b86228cce672..6952d432e62b 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -206,8 +206,8 @@ static int amd64_set_scrub_rate(struct mem_ctl_info *mci, u32 bw)
 	if (pvt->fam == 0xf)
 		min_scrubrate = 0x0;
 
-	/* Erratum #505 for F15h Model 0x00 - Model 0x01, Stepping 0 */
-	if (pvt->fam == 0x15 && pvt->model <= 0x01 && pvt->stepping < 0x1)
+	/* Erratum #505 */
+	if (pvt->fam == 0x15 && pvt->model < 0x10)
 		f15h_select_dct(pvt, 0);
 
 	return __amd64_set_scrub_rate(pvt->F3, bw, min_scrubrate);
@@ -219,8 +219,8 @@ static int amd64_get_scrub_rate(struct mem_ctl_info *mci)
 	u32 scrubval = 0;
 	int i, retval = -EINVAL;
 
-	/* Erratum #505 for F15h Model 0x00 - Model 0x01, Stepping 0 */
-	if (pvt->fam == 0x15 && pvt->model <= 0x01 && pvt->stepping < 0x1)
+	/* Erratum #505 */
+	if (pvt->fam == 0x15 && pvt->model < 0x10)
 		f15h_select_dct(pvt, 0);
 
 	amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval);
-- 
1.8.4.rc3


-- 
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
--

Re: [PATCH] amd64_edac: Correct erratum 505 range

[Borislav Petkov]

On Sat, Aug 24, 2013 at 11:25:00AM +0200, Borislav Petkov wrote:
> I've got one more patch which needs to go to tip/x86/ras for 3.12.
> It was not worth it IMO to send a pull request for a single patch so
> please apply.

Ok, one more but this is the last one, I promise! :-)

Thanks.

---
From: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Date: Sat, 24 Aug 2013 10:47:48 -0500
Subject: [PATCH] amd64_edac: Fix incorrect wraparounds

dct_base and dct_limit obtain 32 bit register values when they read
their respective pci config space registers. A left shift beyond 32 bits
will cause them to wrap around. Similar case for chan_addr as can be
seen from the bug report (link below). In the patch, we rectify this by
casting chan_addr to u64 and by comparing dct_base and dct_limit against
properly shifted sys_addr in order to compare the correct bits.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Link: http://lkml.kernel.org/r/20130819132302.GA12171@elgon.mountain
Signed-off-by: Borislav Petkov <bp@suse.de>
---
 drivers/edac/amd64_edac.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 6952d432e62b..3c9e4e98c651 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1558,11 +1558,12 @@ static int f15_m30h_match_to_this_node(struct amd64_pvt *pvt, unsigned range,
 	}
 
 	/* Verify sys_addr is within DCT Range. */
-	dct_base = (dct_sel_baseaddr(pvt) << 27);
-	dct_limit = (((dct_cont_limit_reg >> 11) & 0x1FFF) << 27) | 0x7FFFFFF;
+	dct_base = (u64) dct_sel_baseaddr(pvt);
+	dct_limit = (dct_cont_limit_reg >> 11) & 0x1FFF;
 
 	if (!(dct_cont_base_reg & BIT(0)) &&
-	    !(dct_base <= sys_addr && dct_limit >= sys_addr))
+	    !(dct_base <= (sys_addr >> 27) &&
+	      dct_limit >= (sys_addr >> 27)))
 		return -EINVAL;
 
 	/* Verify number of dct's that participate in channel interleaving. */
@@ -1584,7 +1585,7 @@ static int f15_m30h_match_to_this_node(struct amd64_pvt *pvt, unsigned range,
 	if (leg_mmio_hole && (sys_addr >= BIT_64(32)))
 		chan_offset = dhar_offset;
 	else
-		chan_offset = dct_base;
+		chan_offset = dct_base << 27;
 
 	chan_addr = sys_addr - chan_offset;
 
@@ -1614,7 +1615,7 @@ static int f15_m30h_match_to_this_node(struct amd64_pvt *pvt, unsigned range,
 		amd64_read_pci_cfg(pvt->F1,
 				   DRAM_CONT_HIGH_OFF + (int) channel * 4,
 				   &tmp);
-		chan_addr +=  ((tmp >> 11) & 0xfff) << 27;
+		chan_addr +=  (u64) ((tmp >> 11) & 0xfff) << 27;
 	}
 
 	f15h_select_dct(pvt, channel);
-- 
1.8.4

-- 
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
--

[GIT PULL] amd64_edac fixlets for 3.12 queue

[Borislav Petkov]

Ok,

here's a pull request which should go ontop of tip/x86/ras.

Please pull guys,
thanks.

The following changes since commit c874b6ba5550b47b667ebf98f549478b4bc988a2:

  Merge tag 'edac_for_3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp into x86/ras (2013-08-15 10:07:20 +0200)

are available in the git repository at:


  git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git tags/edac_fixes_for_3.12

for you to fetch changes up to 4fc06b3171f4de92cd21bf7ab1cb0bf62f05769d:

  amd64_edac: Fix incorrect wraparounds (2013-08-27 15:00:22 +0200)

----------------------------------------------------------------
Two fixlets for Erratum 505 ranges and overflowing variables.

----------------------------------------------------------------
Aravind Gopalakrishnan (1):
      amd64_edac: Fix incorrect wraparounds

Borislav Petkov (1):
      amd64_edac: Correct erratum 505 range

 drivers/edac/amd64_edac.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

-- 
Regards/Gruss,
Boris.

Re: [GIT PULL] amd64_edac fixlets for 3.12 queue

[Ingo Molnar]

* Borislav Petkov <bp@alien8.de> wrote:

> Ok,
> 
> here's a pull request which should go ontop of tip/x86/ras.
> 
> Please pull guys,
> thanks.
> 
> The following changes since commit c874b6ba5550b47b667ebf98f549478b4bc988a2:
> 
>   Merge tag 'edac_for_3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp into x86/ras (2013-08-15 10:07:20 +0200)
> 
> are available in the git repository at:
> 
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git tags/edac_fixes_for_3.12
> 
> for you to fetch changes up to 4fc06b3171f4de92cd21bf7ab1cb0bf62f05769d:
> 
>   amd64_edac: Fix incorrect wraparounds (2013-08-27 15:00:22 +0200)
> 
> ----------------------------------------------------------------
> Two fixlets for Erratum 505 ranges and overflowing variables.
> 
> ----------------------------------------------------------------
> Aravind Gopalakrishnan (1):
>       amd64_edac: Fix incorrect wraparounds
> 
> Borislav Petkov (1):
>       amd64_edac: Correct erratum 505 range
> 
>  drivers/edac/amd64_edac.c | 19 ++++++++++---------
>  1 file changed, 10 insertions(+), 9 deletions(-)

Pulled, thanks Boris!

	Ingo