From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754505Ab3J3T3S (ORCPT ); Wed, 30 Oct 2013 15:29:18 -0400 Received: from mx1.redhat.com ([209.132.183.28]:11859 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752059Ab3J3T3R (ORCPT ); Wed, 30 Oct 2013 15:29:17 -0400 Date: Wed, 30 Oct 2013 21:31:50 +0200 From: "Michael S. Tsirkin" Cc: Peter Zijlstra , Paul Mackerras , Ingo Molnar , Arnaldo Carvalho de Melo , Thomas Gleixner , "H. Peter Anvin" , x86@kernel.org, Stephane Eranian , Andi Kleen , linux-kernel@vger.kernel.org Subject: [PATCH] x86: print microcode revision on PEBs errors Message-ID: <20131030193150.GA7765@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline To: unlisted-recipients:; (no To-header on input) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sandy bridge CPUs with old microcode, PEBs fails and suggests a microcode update. Print out the required and the actual revision to make it easier to figure out what's wrong. Signed-off-by: Michael S. Tsirkin --- arch/x86/kernel/cpu/perf_event_intel.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index f31a165..81f2789 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -2105,6 +2105,8 @@ static int intel_snb_pebs_broken(int cpu) } } + pr_info("PEBS checking: microcode 0x%x min legal 0x%x\n", + cpu_data(cpu).microcode, rev); return (cpu_data(cpu).microcode < rev); } -- MST