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From: Mauro Carvalho Chehab <m.chehab@samsung.com>
To: Andy Lutomirski <luto@amacapital.net>
Cc: "Luck, Tony" <tony.luck@intel.com>,
	Wolfram Sang <wsa@the-dreams.de>,
	"linux-i2c@vger.kernel.org" <linux-i2c@vger.kernel.org>,
	Jean Delvare <khali@linux-fr.org>,
	Guenter Roeck <linux@roeck-us.net>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Rui Wang <ruiv.wang@gmail.com>
Subject: Re: [PATCH v6 4/4] i2c, i2c_imc: Add DIMM bus code
Date: Fri, 28 Feb 2014 16:15:06 -0300	[thread overview]
Message-ID: <20140228161506.62889d46@samsung.com> (raw)
In-Reply-To: <CALCETrVwSj3KGcPqQD2Kd9W5FCHyPWLukCVr0BZLdQc_Fgz4qA@mail.gmail.com>

Em Wed, 19 Feb 2014 17:39:07 -0800
Andy Lutomirski <luto@amacapital.net> escreveu:

> On Wed, Feb 19, 2014 at 11:03 AM, Luck, Tony <tony.luck@intel.com> wrote:
> >> (I'm c/c Tony here, as he also shared the same concern that I had on a
> >> previous feedback about using I2C to talk with the DIMM).
> >
> > Correct - I've heard the same issues that reads on I2C can be misinterpreted
> > as writes ... and oops, you have a brick.
> 
> Is this true on DDR3 DIMMs, i.e. anything that's compatible with
> LGA2011?  If you plug a DIMM into an LGA2011 board's memory slot,
> then, one way or another, it's very likely that there will be TSOD
> traffic, if for no other purpose than to determine that there is no
> TSOD present.  TSOD traffic consists of reads and writes, both with
> and without register numbers.  (Sorry, I can never remember the smbus
> terminology here -- the relevant transactions are two-byte reads and
> two-byte writes, both with a command specified and without one.  One
> of the bits in the iMC SMBUS registers tells the controller which kind
> of read to use to probe the thermometer.)

An update on that: I double-checked with a DIMM manufacturer.
I was told that some DIMM models have write protect circuits but
others don't.

So, yeah, accessing it could eventually brick the DIMM, depending 
on the DIMM model, if such driver won't block I2C write ops or
if the BIOS is also trying to access the bus at the same time.

Regards,
Mauro

  parent reply	other threads:[~2014-02-28 19:15 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-21  1:45 [PATCH v6 0/4] iMC SMBUS driver and DIMM bus probing Andy Lutomirski
2013-12-21  1:45 ` [PATCH v6 1/4] Move Intel SNB device ids from sb_edac to pci_ids.h Andy Lutomirski
2013-12-21  1:45 ` [PATCH v6 2/4] sb_edac: Claim a different PCI device Andy Lutomirski
2013-12-21  1:45 ` [PATCH v6 3/4] i2c_imc: New driver for Intel's iMC, found on LGA2011 chips Andy Lutomirski
2014-02-19 15:38   ` Wolfram Sang
2014-02-19 17:10     ` Andy Lutomirski
2013-12-21  1:45 ` [PATCH v6 4/4] i2c, i2c_imc: Add DIMM bus code Andy Lutomirski
2014-02-19 15:16   ` Wolfram Sang
2014-02-19 17:30     ` Andy Lutomirski
2014-02-19 18:51       ` Mauro Carvalho Chehab
2014-02-19 19:03         ` Luck, Tony
2014-02-20  1:39           ` Andy Lutomirski
2014-02-20 16:42             ` Luck, Tony
2014-02-20 23:43               ` Andy Lutomirski
2014-02-28 19:15             ` Mauro Carvalho Chehab [this message]
2014-02-28 20:14               ` Andy Lutomirski
2014-02-19 19:26       ` One Thousand Gnomes
2014-02-20  1:30         ` Andy Lutomirski
2014-02-21 15:32           ` One Thousand Gnomes
2014-02-25 19:54             ` Andy Lutomirski

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