Re: [qemu64,+smep,+smap] WARNING: CPU: 1 PID: 0 at arch/x86/kernel/cpu/amd.c:220 init_amd()

[Fengguang Wu <fengguang.wu@intel.com>]

On Fri, Mar 07, 2014 at 02:11:50PM -0800, H. Peter Anvin wrote:
> On 03/07/2014 02:06 PM, Dave Jones wrote:
> > On Fri, Mar 07, 2014 at 10:38:56PM +0100, Borislav Petkov wrote:
> > 
> >  > * Another option would be if we change the f/m/s of "qemu64" so that
> >  > the test doesn't fire.
> >  > 
> >  > What also makes me wonder is why is this thing even called qemu64?? AMD
> >  > family 6 was 32-bit only CPUs so 64 is kinda wrong IMO. I mean, the
> >  > kernel code is in "ifdef CONFIG_X86_32" block so "qemu64" is patently
> >  > wrong naming.
> > 
> > Additionally, fam:6 model:6 stepping 3 never existed in the real world afaict.
> > I used to keep x86info's stepping db pretty up to date, and that only has knowledge
> > of stepping 1 & 2.[*]  Modelling qemu on something from the real world might be
> > a better idea than inventing new special cases.
> > 
> >  > Oh, and the thing has CPUID_EXT2_LM which is also a WTH moment for me.
> >  > Paolo, what's going on here?
> > 
> > Yeah, this is a mess, there should be no family < 0xf with LM set.
> > 
> > 	Dave
> 
> For AMD, at least.  Intel obviously have a bunch of chips with family ==
> 6 and LM.
> 
> Perhaps Fengguang should switch from "qemu64,+smep,+smap" to something
> like "Haswell,+smep,+smap" instead for the time being at least?

Yeah I confirmed that it works w/o the warning!

[    0.575854] smpboot: CPU0: Intel Core Processor (Haswell) (fam: 06, model: 3c, stepping: 01)

Thanks!

Fengguang