Re: GPF in intel_pmu_lbr_reset() with qemu -cpu host

[Borislav Petkov <bp@alien8.de>]

On Fri, Mar 21, 2014 at 05:34:26PM -0700, H. Peter Anvin wrote:
> It's not just KVM, though.

Right, there's also hw models which don't have a certain MSR all of a
sudden. And yeah yeah, it is architectural so it must be there, yadda,
yadda, we've heard all that already. But we want to be defensive with
our MSR accesses and not explode each time a MSR is missing.

Btw, hpa, I'm looking at the msr_read/msr_write() things now in
arch/x86/lib/msr.c and that second argument "struct msr *m" is kinda
clumsy since all the call sites will need to define a struct msr for
passing which is not intuitive. So I'd rather turn it into u64 so using
those functions would be as simple as possible:

	u64 msrval;
	int ret;

	...

	ret = msr_read(MSR_BLA, &msrval);
	if (ret < 0)
		goto err;

	...

	... msrval ...

and

	ret = msr_write(MSR_DONG, msrval);
	if (ret < 0) {
		pr_err("Error configuring my fancy hw feature.\n");
		goto unwind;
	}

This should be the most intuitive usage, IMO. Agreed?

-- 
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
--