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From: Mark Brown <broonie@kernel.org>
To: Lars-Peter Clausen <lars@metafoo.de>
Cc: Arun Shamanna Lakshmi <aruns@nvidia.com>,
	Songhee Baek <sbaek@nvidia.com>,
	"'alsa-devel@alsa-project.org'" <alsa-devel@alsa-project.org>,
	"'swarren@wwwdotorg.org'" <swarren@wwwdotorg.org>,
	"'tiwai@suse.de'" <tiwai@suse.de>,
	"'lgirdwood@gmail.com'" <lgirdwood@gmail.com>,
	"'linux-kernel@vger.kernel.org'" <linux-kernel@vger.kernel.org>
Subject: Re: [alsa-devel] [PATCH] ASoC: Add support for multi register mux
Date: Mon, 31 Mar 2014 13:07:48 +0100	[thread overview]
Message-ID: <20140331120748.GS2269@sirena.org.uk> (raw)
In-Reply-To: <533957C8.2030105@metafoo.de>

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On Mon, Mar 31, 2014 at 01:55:52PM +0200, Lars-Peter Clausen wrote:
> On 03/31/2014 01:21 PM, Mark Brown wrote:

> >The above is a bit confusing...  partly this is because of a lack of
> >context (what is MULTI_MUX_INPUT_OFFSET?) and partly because it isn't
> >entirely obvious that stopping as soon as we see any value set is the
> >right choice, especially given the addition to rather than setting of
> >val.

> I think the idea is that since we know that for one-hot encodings only
> powers of two are valid values the other bits are used to encode the
> register number. E.g 0x4 means bit 3 in register 0, 0x5 means bit 3 in
> register 1, 0x6 means bit 3 in register 2 and so on. I guess it is possible
> to make it work. But this seems to be quite hack-ish to me. You'd have to be
> careful that MULTI_MUX_INPUT_OFFSET(reg_idx) never evaluates to a power of
> two and there are probably some more pitfalls.

Ugh, right.  The fact that I couldn't tell that this was what the code
was trying to do from looking at it is not a good sign here.

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  reply	other threads:[~2014-03-31 12:08 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-26  0:02 [PATCH] ASoC: Add support for multi register mux Arun Shamanna Lakshmi
2014-03-26 19:38 ` [alsa-devel] " Lars-Peter Clausen
2014-03-26 22:41   ` Songhee Baek
2014-03-27  9:19     ` Lars-Peter Clausen
2014-03-27 18:24       ` Songhee Baek
     [not found]       ` <5571431004A69147BCABABE4E097D66BA3EFF70CFC@HQMAIL02.nvidia.com>
2014-03-28 18:10         ` Songhee Baek
2014-03-29  2:30         ` Songhee Baek
2014-03-29 10:53           ` Lars-Peter Clausen
2014-03-30  6:12             ` Arun Shamanna Lakshmi
2014-03-31 11:21               ` Mark Brown
2014-03-31 11:55                 ` Lars-Peter Clausen
2014-03-31 12:07                   ` Mark Brown [this message]
2014-04-01  6:08                     ` Arun Shamanna Lakshmi
2014-03-27  1:08   ` Mark Brown
2014-03-27  4:33     ` Songhee Baek
2014-03-27  1:29 ` Mark Brown
  -- strict thread matches above, loose matches on Subject: below --
2014-03-18 23:51 Arun Shamanna Lakshmi
2014-03-18 23:59 ` Mark Brown
2014-03-19 23:44   ` Arun Shamanna Lakshmi
2014-03-20 11:48     ` Mark Brown
2014-03-20 18:20       ` Stephen Warren
2014-03-20 18:36         ` Mark Brown
2014-03-20 19:05           ` [alsa-devel] " Lars-Peter Clausen
2014-03-20 19:40             ` Lars-Peter Clausen
2014-03-21 11:37               ` Mark Brown

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