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From: Peter Zijlstra <peterz@infradead.org>
To: Stephane Eranian <eranian@google.com>
Cc: Venkatesh Srinivas <venkateshs@google.com>,
	LKML <linux-kernel@vger.kernel.org>,
	"mingo@elte.hu" <mingo@elte.hu>,
	"ak@linux.intel.com" <ak@linux.intel.com>,
	"Yan, Zheng" <zheng.z.yan@intel.com>
Subject: Re: [PATCH] perf/x86/intel: Use rdmsrl_safe when initializing RAPL PMU.
Date: Wed, 23 Apr 2014 16:45:38 +0200	[thread overview]
Message-ID: <20140423144538.GN11096@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <CABPqkBRm8Ux15UY2+hF1TZdVsgVbYV+9XPiuh9m497Mr3oJ0Wg@mail.gmail.com>

On Wed, Apr 23, 2014 at 04:31:32PM +0200, Stephane Eranian wrote:
> On Thu, Mar 13, 2014 at 8:36 PM, Venkatesh Srinivas
> <venkateshs@google.com> wrote:
> > CPUs which should support the RAPL counters according to
> > Family/Model/Stepping may still issue #GP when attempting to access
> > the RAPL MSRs. This may happen when Linux is running under KVM and
> > we are passing-through host F/M/S data, for example. Use rdmsrl_safe
> > to first access the RAPL_POWER_UNIT MSR; if this fails, do not
> > attempt to use this PMU.
> >
> > Signed-off-by: Venkatesh Srinivas <venkateshs@google.com>
> > ---
> >  arch/x86/kernel/cpu/perf_event_intel_rapl.c | 12 +++++++++---
> >  1 file changed, 9 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/x86/kernel/cpu/perf_event_intel_rapl.c b/arch/x86/kernel/cpu/perf_event_intel_rapl.c
> > index 5ad35ad..95700e5 100644
> > --- a/arch/x86/kernel/cpu/perf_event_intel_rapl.c
> > +++ b/arch/x86/kernel/cpu/perf_event_intel_rapl.c
> > @@ -511,6 +511,7 @@ static int rapl_cpu_prepare(int cpu)
> >         struct rapl_pmu *pmu = per_cpu(rapl_pmu, cpu);
> >         int phys_id = topology_physical_package_id(cpu);
> >         u64 ms;
> > +       u64 msr_rapl_power_unit_bits;
> >
> >         if (pmu)
> >                 return 0;
> > @@ -518,6 +519,9 @@ static int rapl_cpu_prepare(int cpu)
> >         if (phys_id < 0)
> >                 return -1;
> >
> > +       if (!rdmsrl_safe(MSR_RAPL_POWER_UNIT, &msr_rapl_power_unit_bits))
> > +               return -1;
> > +
> I have a problem with this patch on native hardware. This
> rdmsrl_safe() systematically
> fails when I know the MSR is perfectly valid on the CPU. Consequently, RAPL PMU
> is disabled when I tried on IvyBridge and Haswell CPUs.
> 
> I don't know the internals of rdmsrl_safe(). Maybe it is invoked too
> early in the boot process.

Weird; so the way it works is that it adds an exception table entry for
the wrmsr instruction, so when the wrmsr generates a fault due to being
an invalid msr the fault handler looks at the exception table, and finds
the entry, which instructs it to continue execution at the error path
and return -EFAULT.



  reply	other threads:[~2014-04-23 14:45 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-13 19:36 [PATCH] perf/x86/intel: Use rdmsrl_safe when initializing RAPL PMU Venkatesh Srinivas
2014-03-14  8:44 ` Peter Zijlstra
2014-03-14 13:56   ` Andi Kleen
2014-03-14 15:21     ` Venkatesh Srinivas
2014-03-14 16:17       ` Andi Kleen
2014-03-14 16:57         ` David Ahern
2014-03-14 23:07           ` Venkatesh Srinivas
2014-04-18 13:08 ` [tip:perf/core] perf/x86/intel: Use rdmsrl_safe() " tip-bot for Venkatesh Srinivas
2014-04-23 14:31 ` [PATCH] perf/x86/intel: Use rdmsrl_safe " Stephane Eranian
2014-04-23 14:45   ` Peter Zijlstra [this message]
2014-04-23 14:49     ` Stephane Eranian
2014-04-23 15:09       ` Peter Zijlstra
2014-04-23 15:14         ` Stephane Eranian
2014-04-23 15:16           ` Borislav Petkov
2014-04-23 15:18             ` Stephane Eranian
2014-04-23 15:35               ` Borislav Petkov
2014-04-23 15:44                 ` Stephane Eranian
2014-04-23 15:55                   ` Borislav Petkov
  -- strict thread matches above, loose matches on Subject: below --
2014-03-07  4:42 Venkatesh Srinivas

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