From: Peter Zijlstra <peterz@infradead.org>
To: kan.liang@intel.com
Cc: andi@firstfloor.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH V4 1/2] perf ignore LBR and extra_regs.
Date: Wed, 9 Jul 2014 10:32:14 +0200 [thread overview]
Message-ID: <20140709083214.GA9918@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <1404838181-3911-1-git-send-email-kan.liang@intel.com>
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On Tue, Jul 08, 2014 at 09:49:40AM -0700, kan.liang@intel.com wrote:
> diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
> index 2bdfbff..f0e8022 100644
> --- a/arch/x86/kernel/cpu/perf_event.c
> +++ b/arch/x86/kernel/cpu/perf_event.c
> @@ -118,6 +118,9 @@ static int x86_pmu_extra_regs(u64 config, struct perf_event *event)
> continue;
> if (event->attr.config1 & ~er->valid_mask)
> return -EINVAL;
> + /* Check if the extra msrs can be safely accessed*/
> + if (!x86_pmu.extra_msr_access[er->idx])
> + continue;
>
> reg->idx = er->idx;
> reg->config = event->attr.config1;
You should return an error here; doing continue will eventually make
it return 0, which is no-error and things will happily create the event
and malfunction.
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next prev parent reply other threads:[~2014-07-09 8:32 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-08 16:49 [PATCH V4 1/2] perf ignore LBR and extra_regs kan.liang
2014-07-08 16:49 ` [PATCH V4 2/2] kvm: " kan.liang
2014-07-09 8:32 ` Peter Zijlstra [this message]
2014-07-09 9:14 ` [PATCH V4 1/2] perf " Peter Zijlstra
2014-07-09 9:19 ` Peter Zijlstra
2014-07-09 9:27 ` Peter Zijlstra
2014-07-09 14:04 ` Liang, Kan
2014-07-09 14:16 ` Peter Zijlstra
2014-07-09 14:32 ` Liang, Kan
2014-07-09 14:58 ` Peter Zijlstra
2014-07-09 15:43 ` Liang, Kan
2014-07-09 16:41 ` Peter Zijlstra
2014-07-09 19:32 ` Liang, Kan
2014-07-10 9:02 ` Peter Zijlstra
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