From: Peter Zijlstra <peterz@infradead.org>
To: kan.liang@intel.com
Cc: andi@firstfloor.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH V4 1/2] perf ignore LBR and extra_regs.
Date: Wed, 9 Jul 2014 11:19:17 +0200 [thread overview]
Message-ID: <20140709091917.GC9918@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <1404838181-3911-1-git-send-email-kan.liang@intel.com>
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On Tue, Jul 08, 2014 at 09:49:40AM -0700, kan.liang@intel.com wrote:
> + /*
> + * Access LBR MSR may cause #GP under certain circumstances.
> + * E.g. KVM doesn't support LBR MSR
> + * Check all LBT MSR here.
> + * Disable LBR access if any LBR MSRs can not be accessed.
> + */
> + if (x86_pmu.lbr_nr) {
> + access = check_msr(x86_pmu.lbr_tos);
> + for (i = 0; i < x86_pmu.lbr_nr; i++) {
> + access &= check_msr(x86_pmu.lbr_from + i);
> + access &= check_msr(x86_pmu.lbr_to + i);
> + }
> + if (!access)
> + x86_pmu.lbr_nr = 0;
> + }
You _could_ write that as:
if (x86_pmu.lbr_nr) {
if (!check_msr(x86_pmu.lbr_tos))
x86_pmu.lbr_nr = 0;
for (i = 0; i < x86_pmu.lbr_nr; i++) {
if (!(check_msr(x86_pmu.lbr_from + i) &&
check_msr(x86_pmu.lbr_to + i)))
x86_pmu.lbr_nr = 0;
}
}
There is no point in checking any more MSRs after the first fail after
all.
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next prev parent reply other threads:[~2014-07-09 9:19 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-08 16:49 [PATCH V4 1/2] perf ignore LBR and extra_regs kan.liang
2014-07-08 16:49 ` [PATCH V4 2/2] kvm: " kan.liang
2014-07-09 8:32 ` [PATCH V4 1/2] perf " Peter Zijlstra
2014-07-09 9:14 ` Peter Zijlstra
2014-07-09 9:19 ` Peter Zijlstra [this message]
2014-07-09 9:27 ` Peter Zijlstra
2014-07-09 14:04 ` Liang, Kan
2014-07-09 14:16 ` Peter Zijlstra
2014-07-09 14:32 ` Liang, Kan
2014-07-09 14:58 ` Peter Zijlstra
2014-07-09 15:43 ` Liang, Kan
2014-07-09 16:41 ` Peter Zijlstra
2014-07-09 19:32 ` Liang, Kan
2014-07-10 9:02 ` Peter Zijlstra
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