From: Andi Kleen <andi@firstfloor.org>
To: "Yan, Zheng" <zheng.z.yan@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Andi Kleen <andi@firstfloor.org>,
linux-kernel@vger.kernel.org, mingo@kernel.org,
acme@infradead.org, eranian@google.com
Subject: Re: [PATCH v3 6/9] perf, x86: handle multiple records in PEBS buffer
Date: Mon, 28 Jul 2014 05:34:29 +0200 [thread overview]
Message-ID: <20140728033429.GI18735@two.firstfloor.org> (raw)
In-Reply-To: <53D5C174.80303@intel.com>
> how about following patch
Looks good to me.
This will also solve the existing problem that perf record -e cycles:u
... gives kernel samples too.
-Andi
> diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
> index 33b4c0e..ea76507 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
> @@ -1016,6 +1016,16 @@ static void setup_pebs_sample_data(struct perf_event *event,
> data->br_stack = &cpuc->lbr_stack;
> }
>
> +static inline bool intel_pmu_pebs_filter(struct perf_event *event,
> + struct pebs_record_nhm *record)
> +{
> + if (event->attr.exclude_user && !kernel_ip(record->ip))
> + return true;
> + if (event->attr.exclude_kernel && kernel_ip(record->ip))
> + return true;
> + return false;
> +}
> +
> static void __intel_pmu_pebs_event(struct perf_event *event,
> struct pt_regs *iregs,
> void *at, void *top, int count)
> @@ -1052,6 +1062,8 @@ static void __intel_pmu_pebs_event(struct perf_event *event,
> struct pebs_record_nhm *p = at;
> if (!(p->status & (1 << event->hw.idx)))
> continue;
> + if (intel_pmu_pebs_filter(event, p))
> + continue;
>
> setup_pebs_sample_data(event, iregs, at, &data, ®s);
> perf_output_sample(&handle, &header, &data, event);
> @@ -1139,6 +1151,8 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)
> WARN_ON_ONCE(!event);
> if (!event->attr.precise_ip)
> continue;
> + if (intel_pmu_pebs_filter(event, p))
> + continue;
> counts[bit]++;
> }
> }
> @@ -1149,7 +1163,8 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)
> event = cpuc->events[bit];
> for (at = base; at < top; at += x86_pmu.pebs_record_size) {
> struct pebs_record_nhm *p = at;
> - if (p->status & (1 << bit))
> + if ((p->status & (1 << bit)) &&
> + !intel_pmu_pebs_filter(event, p))
> break;
> }
>
> ---
>
--
ak@linux.intel.com -- Speaking for myself only.
next prev parent reply other threads:[~2014-07-28 3:34 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-22 8:09 [PATCH v3 0/7] perf, x86: large PEBS interrupt threshold Yan, Zheng
2014-07-22 8:09 ` [PATCH v3 1/9] perf, core: introduce pmu context switch callback Yan, Zheng
2014-07-22 8:09 ` [PATCH v3 2/9] perf, x86: use context switch callback to flush LBR stack Yan, Zheng
2014-07-22 8:09 ` [PATCH v3 3/9] perf, x86: use the PEBS auto reload mechanism when possible Yan, Zheng
2014-07-22 8:09 ` [PATCH v3 4/9] perf, x86: introduce setup_pebs_sample_data() Yan, Zheng
2014-07-22 8:09 ` [PATCH v3 5/9] perf, x86: large PEBS interrupt threshold Yan, Zheng
2014-07-22 16:16 ` Andi Kleen
2014-07-23 0:59 ` Yan, Zheng
2014-07-22 8:09 ` [PATCH v3 6/9] perf, x86: handle multiple records in PEBS buffer Yan, Zheng
2014-07-25 8:10 ` Peter Zijlstra
2014-07-25 8:34 ` Yan, Zheng
2014-07-25 14:06 ` Peter Zijlstra
2014-07-28 2:24 ` Yan, Zheng
2014-07-28 3:36 ` Andi Kleen
2014-07-28 6:52 ` Peter Zijlstra
2014-07-31 7:31 ` Yan, Zheng
2014-07-31 14:44 ` Andi Kleen
2014-07-31 15:25 ` Peter Zijlstra
2014-07-25 15:04 ` Andi Kleen
2014-07-25 15:53 ` Peter Zijlstra
2014-07-25 16:40 ` Andi Kleen
2014-07-28 3:20 ` Yan, Zheng
2014-07-28 3:34 ` Andi Kleen [this message]
2014-07-28 6:54 ` Peter Zijlstra
2014-07-22 8:10 ` [PATCH v3 7/9] perf, x86: drain PEBS buffer during context switch Yan, Zheng
2014-07-22 8:10 ` [PATCH v3 8/9] perf, x86: enlarge PEBS buffer Yan, Zheng
2014-07-22 8:10 ` [PATCH v3 9/9] tools, perf: Allow the user to disable time stamps Yan, Zheng
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