* [PATCH] DOCUMENTATION: Fixed typo in an example in memory-barriers.txt @ 2014-08-23 6:05 Ganesh Rapolu 2014-08-23 18:01 ` Randy Dunlap 0 siblings, 1 reply; 4+ messages in thread From: Ganesh Rapolu @ 2014-08-23 6:05 UTC (permalink / raw) To: rdunlap; +Cc: linux-doc, linux-kernel, Ganesh Rapolu In the first example in the memory-barriers.txt file, CPU 2 is assigned to run (x = B; y = A;). However, the rest of the example proceeds as if CPU 2 had been running (x = A; y = B;) as shown by the descriptions of the possible executions: STORE A=3, STORE B=4, x=LOAD A->3, y=LOAD B->4 STORE A=3, STORE B=4, y=LOAD B->4, x=LOAD A->3 STORE A=3, x=LOAD A->3, STORE B=4, y=LOAD B->4 STORE A=3, x=LOAD A->3, y=LOAD B->2, STORE B=4 STORE A=3, y=LOAD B->2, STORE B=4, x=LOAD A->3 STORE A=3, y=LOAD B->2, x=LOAD A->3, STORE B=4 STORE B=4, STORE A=3, x=LOAD A->3, y=LOAD B->4 STORE B=4, ... ... The change was merely to make the inital evironment consistent with what happens in the rest of the example. Signed-off-by: Ganesh Rapolu <ganesh.rapolu@hotmail.com> --- Documentation/memory-barriers.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index a4de88f..9a46bbe 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -115,8 +115,8 @@ For example, consider the following sequence of events: CPU 1 CPU 2 =============== =============== { A == 1; B == 2 } - A = 3; x = B; - B = 4; y = A; + A = 3; x = A; + B = 4; y = B; The set of accesses as seen by the memory system in the middle can be arranged in 24 different combinations: -- 2.0.4 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] DOCUMENTATION: Fixed typo in an example in memory-barriers.txt 2014-08-23 6:05 [PATCH] DOCUMENTATION: Fixed typo in an example in memory-barriers.txt Ganesh Rapolu @ 2014-08-23 18:01 ` Randy Dunlap 2014-08-23 20:17 ` Alexey Dobriyan 2014-08-28 20:01 ` Paul E. McKenney 0 siblings, 2 replies; 4+ messages in thread From: Randy Dunlap @ 2014-08-23 18:01 UTC (permalink / raw) To: Ganesh Rapolu Cc: linux-doc, linux-kernel, David Howells, Alexey Dobriyan, Paul E. McKenney, Andrew Morton On 08/22/14 23:05, Ganesh Rapolu wrote: > In the first example in the memory-barriers.txt file, CPU 2 is assigned to > run (x = B; y = A;). However, the rest of the example proceeds as if CPU 2 had been > running (x = A; y = B;) as shown by the descriptions of the possible executions: > > STORE A=3, STORE B=4, x=LOAD A->3, y=LOAD B->4 > STORE A=3, STORE B=4, y=LOAD B->4, x=LOAD A->3 > STORE A=3, x=LOAD A->3, STORE B=4, y=LOAD B->4 > STORE A=3, x=LOAD A->3, y=LOAD B->2, STORE B=4 > STORE A=3, y=LOAD B->2, STORE B=4, x=LOAD A->3 > STORE A=3, y=LOAD B->2, x=LOAD A->3, STORE B=4 > STORE B=4, STORE A=3, x=LOAD A->3, y=LOAD B->4 > STORE B=4, ... > ... > > The change was merely to make the inital evironment consistent with what happens in the > rest of the example. > > Signed-off-by: Ganesh Rapolu <ganesh.rapolu@hotmail.com> Comments David, Alexey, Andrew, Paul? This would revert Alexey's patch 615cc2c9cf9529846fbc342560d6787c2ccaaeea: "Documentation/memory-barriers.txt: fix important typo re memory barriers" that was merged on June 6, 2014. Thanks. > --- > Documentation/memory-barriers.txt | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt > index a4de88f..9a46bbe 100644 > --- a/Documentation/memory-barriers.txt > +++ b/Documentation/memory-barriers.txt > @@ -115,8 +115,8 @@ For example, consider the following sequence of events: > CPU 1 CPU 2 > =============== =============== > { A == 1; B == 2 } > - A = 3; x = B; > - B = 4; y = A; > + A = 3; x = A; > + B = 4; y = B; > > The set of accesses as seen by the memory system in the middle can be arranged > in 24 different combinations: > -- ~Randy ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] DOCUMENTATION: Fixed typo in an example in memory-barriers.txt 2014-08-23 18:01 ` Randy Dunlap @ 2014-08-23 20:17 ` Alexey Dobriyan 2014-08-28 20:01 ` Paul E. McKenney 1 sibling, 0 replies; 4+ messages in thread From: Alexey Dobriyan @ 2014-08-23 20:17 UTC (permalink / raw) To: Randy Dunlap Cc: Ganesh Rapolu, linux-doc, linux-kernel, David Howells, Paul E. McKenney, Andrew Morton On Sat, Aug 23, 2014 at 11:01:01AM -0700, Randy Dunlap wrote: > On 08/22/14 23:05, Ganesh Rapolu wrote: > > In the first example in the memory-barriers.txt file, CPU 2 is assigned to > > run (x = B; y = A;). However, the rest of the example proceeds as if CPU 2 had been > > running (x = A; y = B;) as shown by the descriptions of the possible executions: > > > > STORE A=3, STORE B=4, x=LOAD A->3, y=LOAD B->4 > > STORE A=3, STORE B=4, y=LOAD B->4, x=LOAD A->3 > > STORE A=3, x=LOAD A->3, STORE B=4, y=LOAD B->4 > > STORE A=3, x=LOAD A->3, y=LOAD B->2, STORE B=4 > > STORE A=3, y=LOAD B->2, STORE B=4, x=LOAD A->3 > > STORE A=3, y=LOAD B->2, x=LOAD A->3, STORE B=4 > > STORE B=4, STORE A=3, x=LOAD A->3, y=LOAD B->4 > > STORE B=4, ... > > ... > > > > The change was merely to make the inital evironment consistent with what happens in the > > rest of the example. so change the rest of the example ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] DOCUMENTATION: Fixed typo in an example in memory-barriers.txt 2014-08-23 18:01 ` Randy Dunlap 2014-08-23 20:17 ` Alexey Dobriyan @ 2014-08-28 20:01 ` Paul E. McKenney 1 sibling, 0 replies; 4+ messages in thread From: Paul E. McKenney @ 2014-08-28 20:01 UTC (permalink / raw) To: Randy Dunlap Cc: Ganesh Rapolu, linux-doc, linux-kernel, David Howells, Alexey Dobriyan, Andrew Morton On Sat, Aug 23, 2014 at 11:01:01AM -0700, Randy Dunlap wrote: > On 08/22/14 23:05, Ganesh Rapolu wrote: > > In the first example in the memory-barriers.txt file, CPU 2 is assigned to > > run (x = B; y = A;). However, the rest of the example proceeds as if CPU 2 had been > > running (x = A; y = B;) as shown by the descriptions of the possible executions: > > > > STORE A=3, STORE B=4, x=LOAD A->3, y=LOAD B->4 > > STORE A=3, STORE B=4, y=LOAD B->4, x=LOAD A->3 > > STORE A=3, x=LOAD A->3, STORE B=4, y=LOAD B->4 > > STORE A=3, x=LOAD A->3, y=LOAD B->2, STORE B=4 > > STORE A=3, y=LOAD B->2, STORE B=4, x=LOAD A->3 > > STORE A=3, y=LOAD B->2, x=LOAD A->3, STORE B=4 > > STORE B=4, STORE A=3, x=LOAD A->3, y=LOAD B->4 > > STORE B=4, ... > > ... > > > > The change was merely to make the inital evironment consistent with what happens in the > > rest of the example. > > > > Signed-off-by: Ganesh Rapolu <ganesh.rapolu@hotmail.com> > > > Comments David, Alexey, Andrew, Paul? > > This would revert Alexey's patch 615cc2c9cf9529846fbc342560d6787c2ccaaeea: > "Documentation/memory-barriers.txt: fix important typo re memory barriers" > that was merged on June 6, 2014. > > Thanks. > > > > --- > > Documentation/memory-barriers.txt | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt > > index a4de88f..9a46bbe 100644 > > --- a/Documentation/memory-barriers.txt > > +++ b/Documentation/memory-barriers.txt > > @@ -115,8 +115,8 @@ For example, consider the following sequence of events: > > CPU 1 CPU 2 > > =============== =============== > > { A == 1; B == 2 } > > - A = 3; x = B; > > - B = 4; y = A; > > + A = 3; x = A; > > + B = 4; y = B; Alexey's patch was correct as far as it went, but it was incomplete. (Read his commit log for more information.) Would either of you like to send a patch fixing up the combinations? Thanx, Paul > > The set of accesses as seen by the memory system in the middle can be arranged > > in 24 different combinations: > > > > > -- > ~Randy > ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2014-08-28 20:01 UTC | newest] Thread overview: 4+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2014-08-23 6:05 [PATCH] DOCUMENTATION: Fixed typo in an example in memory-barriers.txt Ganesh Rapolu 2014-08-23 18:01 ` Randy Dunlap 2014-08-23 20:17 ` Alexey Dobriyan 2014-08-28 20:01 ` Paul E. McKenney
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).