From: Andi Kleen <andi@firstfloor.org>
To: Peter Zijlstra <peterz@infradead.org>
Cc: linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] perf/x86/intel: Add Haswell-EP uncore support
Date: Thu, 4 Sep 2014 17:56:13 +0200 [thread overview]
Message-ID: <20140904155613.GD4120@two.firstfloor.org> (raw)
In-Reply-To: <20140904081928.GL3190@worktop.ger.corp.intel.com>
On Thu, Sep 04, 2014 at 10:19:28AM +0200, Peter Zijlstra wrote:
> On Fri, Aug 22, 2014 at 07:29:26AM +0200, Andi Kleen wrote:
> > > diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
> > > index 4785ee8..2485fd9 100644
> > > --- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
> > > +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
> > > @@ -883,6 +883,8 @@ static int __init uncore_pci_init(void)
> > > case 62: /* Ivy Bridge-EP */
> > > ret = ivbep_uncore_pci_init();
> > > break;
> > > + case 63: /* Haswell-EP */
> > > + ret = hswep_uncore_pci_init();
> >
> > Is the lack of break intentional? If yes please add a /* FALL THROUGH */
> > comment.
>
> This does look inconsistent with the surrounding code, which does
> suggest it was indeed an oversight and not on purpose.
>
> Zheng?
Yes it was a bug. Zheng left Intel and I have taken over the driver.
I'll send a version with this and some other issues fixed shortly.
-Andi
--
ak@linux.intel.com -- Speaking for myself only.
prev parent reply other threads:[~2014-09-04 15:56 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-20 1:50 [PATCH 1/2] perf/x86/intel: Add Haswell-EP uncore support Yan, Zheng
2014-08-20 1:50 ` [PATCH 2/2] perf/x86/uncore: register PMU only if uncore pci device exists Yan, Zheng
2014-08-22 5:29 ` [PATCH 1/2] perf/x86/intel: Add Haswell-EP uncore support Andi Kleen
2014-09-04 8:19 ` Peter Zijlstra
2014-09-04 15:56 ` Andi Kleen [this message]
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