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Date: Sat, 20 Sep 2014 14:19:05 +0200
From: Wolfram Sang <wsa@the-dreams.de>
To: Addy Ke <addy.ke@rock-chips.com>
Cc: max.schwarz@online.de, heiko@sntech.de, olof@lixom.net,
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Subject: Re: [PATCH v2] i2c: rk3x: fix divisor calculation for SCL frequency
Message-ID: <20140920121904.GB3850@katana>
References: <1409884333-3544-1-git-send-email-addy.ke@rock-chips.com>
 <1410147505-5930-1-git-send-email-addy.ke@rock-chips.com>
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On Mon, Sep 08, 2014 at 11:38:25AM +0800, Addy Ke wrote:
> I2C_CLKDIV register descripted in the previous version of
> RK3x chip manual is incorrect. Plus 1 is required.
>=20
> The correct formula:
> - T(SCL_HIGH) =3D T(PCLK) * (CLKDIVH + 1) * 8
> - T(SCL_LOW) =3D T(PCLK) * (CLKDIVL + 1) * 8
> - (SCL Divsor) =3D 8 * ((CLKDIVL + 1) + (CLKDIVH + 1))
> - SCL =3D PCLK / (CLK Divsor)
>=20
> It will be updated to the latest version of chip manual.
>=20
> Signed-off-by: Addy Ke <addy.ke@rock-chips.com>

Applied to for-next, thanks!


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