RE: [V5 PATCH 1/1] driver:mtd:spi-nor: Add quad I/O support for Micron spi nor

bpqw
2014-11-12T01:20:08Z

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 1119 bytes --]

>I have almost verified all the micros parts for operating quad mode and the quad enable bit is
>volatile by default and no need to set it on software.

>Why this code is meant for - does micron has changed this bit operation on newly added parts?

>thanks!
>--
>Jagan.

For Micron Spi norflash,if you want to make it work Quad I/O mode,you can do it by set
Two registers,Nonvolatile Configuration resister(NVCR) and Enhanced volatile confuration register(EVCR),
but according to spi-nor.c,and micron spi nor,we recommend that if want to enable Micron spi nor Quad I/O
mode,the best way is to set EVCR.
Of course,you can use Quad/Dual operation command to read/write Micron spi nor in the spi nor Extended I/O mode.
But their command-address-data is different.

The purpose of this patch is only to enable Micron spi nor Quad I/O mode,if want to make Micron spi nor work
Under Quad I/O mode.

Hi,Brian

How about this patch?Please give me some tips,thanks.
ÿôèº{.nÇ+‰·Ÿ®‰­†+%ŠËÿ±éÝ¶\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠ{ayº\x1dÊ‡Ú™ë,j\a­¢f£¢·hšïêÿ‘êçz_è®\x03(­éšŽŠÝ¢j"ú\x1a¶^[m§ÿÿ¾\a«þG«éÿ¢¸?™¨è­Ú&£ø§~á¶iO•æ¬z·švØ^\x14\x04\x1a¶^[m§ÿÿÃ\fÿ¶ìÿ¢¸?–I¥