Re: [PATCH v2 1/3] dmaengine: qcom_bam_dma: Generalize BAM register offset calculations

Pramod Gurav
2014-10-01T08:19:00Z

On Tuesday 30 September 2014 03:44 AM, Andy Gross wrote:
> On Mon, Sep 29, 2014 at 10:03:07AM +0530, Archit Taneja wrote:
>> The BAM DMA IP comes in different versions. The register offset layout varies
>> among these versions. The layouts depend on which generation/family of SoCs they
>> belong to.
>>
>> The current SoCs(like 8084, 8074) have a layout where the Top level registers
>> come in the beginning of the address range, followed by pipe and event
>> registers. The BAM revision numbers fall above 1.4.0.
>>
>> The older SoCs (like 8064, 8960) have a layout where the pipe registers come
>> first, and the top level come later. These have BAM revision numbers lesser than
>> 1.4.0.
>>
>> It isn't suitable to have macros provide the register offsets with the layouts
>> changed. Future BAM revisions may have different register layouts too. The
>> register addresses are now calculated by referring a table which contains a base
>> offset and multipliers for pipe/evnt/ee registers.
>>
>> We have a common function bam_addr() which computes addresses for all the
>> registers. When computing address of top level/ee registers, we pass 0 to the
>> pipe argument in addr() since they don't have any multiple instances.
>>
>> Some of the unused register definitions are removed. We can add new registers as
>> we need them.
>
> Vinod,
>
> These changes replace the patch set I had that implemented support for the
> v.1.3.0 register set.

Andy,
With your change "dmaengine: qcom_bam_dma: Add v1.3.0 driver support"
and enabling qcom_bam_dma driver i was seeing some crashes in the kernel
on IFC6410. But after reverting you change and applying these changes
from Vinod I see IFC6410 booting fine.

Here are the crash logs in case it helps and if your changes are still
planned by you for upstream.

http://paste.ubuntu.com/8471405/

Thanks
Pramod
>
>