From: Peter Zijlstra <peterz@infradead.org>
To: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>,
linux-kernel@vger.kernel.org, Robert Richter <rric@kernel.org>,
Frederic Weisbecker <fweisbec@gmail.com>,
Mike Galbraith <efault@gmx.de>, Paul Mackerras <paulus@samba.org>,
Stephane Eranian <eranian@google.com>,
Andi Kleen <ak@linux.intel.com>,
kan.liang@intel.com, adrian.hunter@intel.com, acme@infradead.org
Subject: Re: [PATCH v5 12/20] x86: perf: intel_pt: Intel PT PMU driver
Date: Wed, 22 Oct 2014 16:45:43 +0200 [thread overview]
Message-ID: <20141022144543.GV12706@worktop.programming.kicks-ass.net> (raw)
In-Reply-To: <1413207948-28202-13-git-send-email-alexander.shishkin@linux.intel.com>
On Mon, Oct 13, 2014 at 04:45:40PM +0300, Alexander Shishkin wrote:
> +static int pt_config(struct perf_event *event)
> +{
> + u64 reg;
> +
> + reg = RTIT_CTL_TOPA | RTIT_CTL_BRANCH_EN;
> +
> + if (!event->attr.exclude_kernel)
> + reg |= RTIT_CTL_OS;
> + if (!event->attr.exclude_user)
> + reg |= RTIT_CTL_USR;
> +
> + reg |= (event->attr.config & PT_CONFIG_MASK);
> +
> + /*
> + * User can try to set bits in RTIT_CTL through PT_BYPASS_MASK,
> + * that aren't supported by the hardware. Weather or not a
> + * particular bitmask is supported by a cpu can't be determined
> + * via cpuid or otherwise, so we have to rely on #GP handling
> + * to catch these cases.
> + */
> + return wrmsrl_safe(MSR_IA32_RTIT_CTL, reg);
> +}
Whether the weather is nice or not :-)
But no, this cannot be, once we've accepted the event is must be
programmable. Failing at the time of programming is vile; pmu::start()
is a void return, failure is not an option there.
The fact that the hardware cannot even tell you the supported mask is
further fail.
IIRC I think Andi once suggested probing each of the 64 bits in that MSR
to determine the supported mask at device init time.
BTW, what's that RTIT thing? Did someone forget to propagate the latest
name change of the thing or so?
next prev parent reply other threads:[~2014-10-22 14:45 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-13 13:45 [PATCH v5 00/20] perf: Add infrastructure and support for Intel PT Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 01/20] perf: Add data_{offset,size} to user_page Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 02/20] perf: Add AUX area to ring buffer for raw data streams Alexander Shishkin
2014-10-22 12:35 ` Peter Zijlstra
2014-10-23 3:05 ` Frederic Weisbecker
2014-10-13 13:45 ` [PATCH v5 03/20] perf: Support high-order allocations for AUX space Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 04/20] perf: Add a capability for AUX_NO_SG pmus to do software double buffering Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 05/20] perf: Add a pmu capability for "exclusive" events Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 06/20] perf: Add AUX record Alexander Shishkin
2014-10-22 13:26 ` Peter Zijlstra
2014-10-22 14:18 ` Alexander Shishkin
2014-10-22 15:07 ` Peter Zijlstra
2014-10-13 13:45 ` [PATCH v5 07/20] perf: Add api for pmus to write to AUX area Alexander Shishkin
2014-10-22 14:02 ` Peter Zijlstra
2014-10-22 14:14 ` Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 08/20] perf: Support overwrite mode for " Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 09/20] perf: Add wakeup watermark control to " Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 10/20] x86: Add Intel Processor Trace (INTEL_PT) cpu feature detection Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 11/20] x86: perf: Intel PT and LBR/BTS are mutually exclusive Alexander Shishkin
2014-10-22 14:15 ` Peter Zijlstra
2014-10-24 7:47 ` Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 12/20] x86: perf: intel_pt: Intel PT PMU driver Alexander Shishkin
2014-10-22 14:17 ` Peter Zijlstra
2014-10-22 14:20 ` Peter Zijlstra
2014-10-24 7:49 ` Alexander Shishkin
2014-10-24 11:26 ` Peter Zijlstra
2014-10-24 12:01 ` Alexander Shishkin
2014-10-22 14:23 ` Peter Zijlstra
2014-10-22 14:27 ` Peter Zijlstra
2014-10-24 7:50 ` Alexander Shishkin
2014-10-22 14:32 ` Peter Zijlstra
2014-10-31 13:13 ` Alexander Shishkin
2014-11-04 15:57 ` Peter Zijlstra
2014-11-11 11:24 ` Alexander Shishkin
2014-11-11 13:20 ` Peter Zijlstra
2014-11-11 14:17 ` Alexander Shishkin
2014-10-22 14:34 ` Peter Zijlstra
2014-10-24 7:52 ` Alexander Shishkin
2014-10-22 14:45 ` Peter Zijlstra [this message]
2014-10-24 8:22 ` Alexander Shishkin
2014-10-24 11:51 ` Peter Zijlstra
2014-10-24 12:13 ` Alexander Shishkin
2014-10-24 13:02 ` Peter Zijlstra
2014-10-24 13:18 ` Alexander Shishkin
2014-10-24 13:48 ` Peter Zijlstra
2014-10-22 14:49 ` Peter Zijlstra
2014-10-22 15:11 ` Peter Zijlstra
2014-10-22 14:55 ` Peter Zijlstra
2014-10-24 7:59 ` Alexander Shishkin
2014-10-22 15:14 ` Peter Zijlstra
2014-10-24 7:59 ` Alexander Shishkin
2014-10-22 15:26 ` Peter Zijlstra
2014-10-13 13:45 ` [PATCH v5 13/20] x86: perf: intel_bts: Add BTS " Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 14/20] perf: add ITRACE_START record to indicate that tracing has started Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 15/20] perf: Add api to (de-)allocate AUX buffers for kernel counters Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 16/20] perf: Add a helper for looking up pmus by type Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 17/20] perf: Add infrastructure for using AUX data in perf samples Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 18/20] perf: Allocate ring buffers for inherited per-task kernel events Alexander Shishkin
2014-10-23 12:38 ` Peter Zijlstra
2014-10-24 7:44 ` Alexander Shishkin
2014-10-30 8:43 ` Peter Zijlstra
2014-10-30 10:20 ` Alexander Shishkin
2014-10-30 13:31 ` Arnaldo Carvalho de Melo
2014-10-13 13:45 ` [PATCH v5 19/20] perf: Allow AUX sampling for multiple events Alexander Shishkin
2014-10-13 13:45 ` [PATCH v5 20/20] perf: Allow AUX sampling of inherited events Alexander Shishkin
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