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From: Peter Zijlstra <peterz@infradead.org>
To: Matt Fleming <matt@console-pimps.org>
Cc: Vikas Shivappa <vikas.shivappa@intel.com>,
	Tejun Heo <tj@kernel.org>, "Auld, Will" <will.auld@intel.com>,
	Vikas Shivappa <vikas.shivappa@linux.intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Fleming, Matt" <matt.fleming@intel.com>,
	h.peter.anvin@intel.com
Subject: Re: Cache Allocation Technology Design
Date: Mon, 10 Nov 2014 16:50:09 +0100	[thread overview]
Message-ID: <20141110155009.GY10501@worktop.programming.kicks-ass.net> (raw)
In-Reply-To: <20141106170323.GJ3592@console-pimps.org>

On Thu, Nov 06, 2014 at 05:03:23PM +0000, Matt Fleming wrote:
> On Tue, 04 Nov, at 02:17:14PM, Peter Zijlstra wrote:
> > 
> > I don't like extending cpusets further. Its already a weird and too big
> > controller.
> > 
> > What is wrong with having a specific CQM controller and using it
> > together with cpusets where desired?
> 
> The specific problem that conflating cpusets and the CAT controller is
> trying to solve is that on some platforms the CLOS ID doesn't move with
> data that travels up the cache hierarchy, i.e. we lose the CLOS ID when
> data moves from LLC to L2.
> 
> I think the idea with pinning CLOS IDs to a specific cpu and any tasks
> that are using that ID is that it works around this problem out of the
> box, rather than requiring sysadmins to configure things.

So either the user needs to set that mode _and_ set cpu masks, or the
user needs to use cpusets and set masks, same difference to me.



  reply	other threads:[~2014-11-10 15:50 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-16 18:44 Cache Allocation Technology Design vikas
2014-10-20 16:18 ` Matt Fleming
2014-10-24 10:53   ` Peter Zijlstra
2014-10-28 23:22     ` Matt Fleming
2014-10-29  8:16       ` Peter Zijlstra
2014-10-29 12:48         ` Matt Fleming
2014-10-29 13:45           ` Peter Zijlstra
2014-10-29 16:32             ` Auld, Will
2014-10-29 17:28               ` Peter Zijlstra
2014-10-29 17:41                 ` Vikas Shivappa
2014-10-29 18:22                   ` Tejun Heo
2014-10-30  7:07                     ` Peter Zijlstra
2014-10-30  7:14                       ` Peter Zijlstra
2014-10-30 12:44                         ` Tejun Heo
2014-10-30 13:19                           ` Peter Zijlstra
2014-10-30 15:25                             ` Tejun Heo
2014-10-30 12:43                       ` Tejun Heo
2014-10-30 13:18                         ` Peter Zijlstra
2014-10-30 17:03                           ` Tejun Heo
2014-10-30 21:43                             ` Peter Zijlstra
2014-10-30 22:22                               ` Tejun Heo
2014-10-30 22:47                                 ` Peter Zijlstra
2014-11-06 16:27                                   ` Matt Fleming
2014-11-06 17:20                                     ` Vikas Shivappa
2014-10-31 13:07                                 ` Peter Zijlstra
2014-10-31 15:58                                   ` Tejun Heo
2014-11-04 13:13                                     ` Peter Zijlstra
2014-11-05 20:41                                       ` Tejun Heo
2014-10-30 14:14                         ` Matt Fleming
     [not found]                         ` <CAAAKZwvJOKsrj_yczDGaNLaNYo+_=HzsTLwDdcaTJqO2VMy8uA@mail.gmail.com>
2014-10-30 17:12                           ` Tejun Heo
2014-10-30 22:35                             ` Tim Hockin
2014-10-31 16:57                               ` Tejun Heo
2014-10-30 23:18                         ` Vikas Shivappa
2014-11-04 13:17                           ` Peter Zijlstra
2014-11-06 17:03                             ` Matt Fleming
2014-11-10 15:50                               ` Peter Zijlstra [this message]
2014-10-29 17:26     ` Vikas Shivappa
2014-10-29 18:16       ` Peter Zijlstra
2014-11-03 23:29 ` Vikas Shivappa

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