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From: Thierry Reding <thierry.reding@gmail.com>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: swarren@wwwdotorg.org, josephl@nvidia.com, balbi@ti.com,
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
	stable@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH V3] ARM: tegra: Re-add removed SoC id macro to tegra_resume()
Date: Mon, 17 Nov 2014 12:07:16 +0100	[thread overview]
Message-ID: <20141117110715.GB25699@ulmo> (raw)
In-Reply-To: <1412947487-24287-1-git-send-email-digetx@gmail.com>

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On Fri, Oct 10, 2014 at 05:24:47PM +0400, Dmitry Osipenko wrote:
> Commit d127e9c ("ARM: tegra: make tegra_resume can work with current and later
> chips") removed tegra_get_soc_id macro leaving used cpu register corrupted after
> branching to v7_invalidate_l1() and as result causing execution of unintended
> code on tegra20. Possibly it was expected that r6 would be SoC id func argument
> since common cpu reset handler is setting r6 before branching to tegra_resume(),
> but neither tegra20_lp1_reset() nor tegra30_lp1_reset() aren't setting r6
> register before jumping to resume function. Fix it by re-adding macro.
> 
> Fixes: d127e9c (ARM: tegra: make tegra_resume can work with current and later chips)
> Cc: <stable@vger.kernel.org> # v3.13+
> Reviewed-by: Felipe Balbi <balbi@ti.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
> V2: added Cc's for lakml and stable, added "Reviewed-by:" Felipe Balbi
> V3: changed commit description, tested on real hw
> 
> PS: It wasn't a bug in my emulator :)
> 
>  arch/arm/mach-tegra/reset-handler.S | 1 +
>  1 file changed, 1 insertion(+)

Applied, thanks.

Thierry

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      reply	other threads:[~2014-11-17 11:07 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-10 13:24 [PATCH V3] ARM: tegra: Re-add removed SoC id macro to tegra_resume() Dmitry Osipenko
2014-11-17 11:07 ` Thierry Reding [this message]

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