* [PATCH] MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration
@ 2014-09-06 2:27 Leonid Yegoshin
2014-11-20 21:45 ` Ralf Baechle
0 siblings, 1 reply; 3+ messages in thread
From: Leonid Yegoshin @ 2014-09-06 2:27 UTC (permalink / raw)
To: linux-mips, aaro.koskinen, david.daney, linux-kernel, ralf,
markos.chandras, dengcheng.zhu, chenhc, akpm
This patch removes a temporary hack for debugging SMTC configuration from
commit 41c594ab65fc89573af296d192aa5235d09717ab
Author: Ralf Baechle <ralf@linux-mips.org>
Date: Wed Apr 5 09:45:45 2006 +0100
which is dropped now. Some performance degradation for multi-VPE systems
is removed.
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
---
arch/mips/include/asm/r4kcache.h | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h
index 4520adc..b2ae1b1 100644
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -50,7 +50,6 @@ extern void (*r4k_blast_icache)(void);
/*
* Optionally force single-threaded execution during I-cache flushes.
*/
-#define PROTECT_CACHE_FLUSHES 1
#ifdef PROTECT_CACHE_FLUSHES
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration
2014-09-06 2:27 [PATCH] MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration Leonid Yegoshin
@ 2014-11-20 21:45 ` Ralf Baechle
2014-11-20 21:54 ` Ralf Baechle
0 siblings, 1 reply; 3+ messages in thread
From: Ralf Baechle @ 2014-11-20 21:45 UTC (permalink / raw)
To: Leonid Yegoshin
Cc: linux-mips, aaro.koskinen, david.daney, linux-kernel,
markos.chandras, dengcheng.zhu, chenhc, akpm
On Fri, Sep 05, 2014 at 07:27:38PM -0700, Leonid Yegoshin wrote:
> This patch removes a temporary hack for debugging SMTC configuration from
>
> commit 41c594ab65fc89573af296d192aa5235d09717ab
> Author: Ralf Baechle <ralf@linux-mips.org>
> Date: Wed Apr 5 09:45:45 2006 +0100
>
> which is dropped now. Some performance degradation for multi-VPE systems
> is removed.
Your patch removes the sole location from where PROTECT_CACHE_FLUSHES
was defined leaving all the #ifdef'ed PROTECT_CACHE_FLUSHES code unused.
So I'm more thinking of something like below.
Ralf
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/r4kcache.h | 59 ----------------------------------------
1 file changed, 59 deletions(-)
diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h
index cd6e0af..e293a8d 100644
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -47,79 +47,20 @@ extern void (*r4k_blast_icache)(void);
#ifdef CONFIG_MIPS_MT
-/*
- * Optionally force single-threaded execution during I-cache flushes.
- */
-#define PROTECT_CACHE_FLUSHES 1
-
-#ifdef PROTECT_CACHE_FLUSHES
-
-extern int mt_protiflush;
-extern int mt_protdflush;
-extern void mt_cflush_lockdown(void);
-extern void mt_cflush_release(void);
-
-#define BEGIN_MT_IPROT \
- unsigned long flags = 0; \
- unsigned long mtflags = 0; \
- if(mt_protiflush) { \
- local_irq_save(flags); \
- ehb(); \
- mtflags = dvpe(); \
- mt_cflush_lockdown(); \
- }
-
-#define END_MT_IPROT \
- if(mt_protiflush) { \
- mt_cflush_release(); \
- evpe(mtflags); \
- local_irq_restore(flags); \
- }
-
-#define BEGIN_MT_DPROT \
- unsigned long flags = 0; \
- unsigned long mtflags = 0; \
- if(mt_protdflush) { \
- local_irq_save(flags); \
- ehb(); \
- mtflags = dvpe(); \
- mt_cflush_lockdown(); \
- }
-
-#define END_MT_DPROT \
- if(mt_protdflush) { \
- mt_cflush_release(); \
- evpe(mtflags); \
- local_irq_restore(flags); \
- }
-
-#else
-
-#define BEGIN_MT_IPROT
-#define BEGIN_MT_DPROT
-#define END_MT_IPROT
-#define END_MT_DPROT
-
-#endif /* PROTECT_CACHE_FLUSHES */
-
#define __iflush_prologue \
unsigned long redundance; \
extern int mt_n_iflushes; \
- BEGIN_MT_IPROT \
for (redundance = 0; redundance < mt_n_iflushes; redundance++) {
#define __iflush_epilogue \
- END_MT_IPROT \
}
#define __dflush_prologue \
unsigned long redundance; \
extern int mt_n_dflushes; \
- BEGIN_MT_DPROT \
for (redundance = 0; redundance < mt_n_dflushes; redundance++) {
#define __dflush_epilogue \
- END_MT_DPROT \
}
#define __inv_dflush_prologue __dflush_prologue
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration
2014-11-20 21:45 ` Ralf Baechle
@ 2014-11-20 21:54 ` Ralf Baechle
0 siblings, 0 replies; 3+ messages in thread
From: Ralf Baechle @ 2014-11-20 21:54 UTC (permalink / raw)
To: Leonid Yegoshin
Cc: linux-mips, aaro.koskinen, david.daney, linux-kernel,
markos.chandras, dengcheng.zhu, chenhc, akpm
On Thu, Nov 20, 2014 at 10:45:58PM +0100, Ralf Baechle wrote:
> So I'm more thinking of something like below.
And while we're at it, these were unused rsp. only used by other
unused macros.
Ralf
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/r4kcache.h | 8 --------
1 file changed, 8 deletions(-)
diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h
index cd6e0af..392b159 100644
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -124,10 +124,6 @@ extern void mt_cflush_release(void);
#define __inv_dflush_prologue __dflush_prologue
#define __inv_dflush_epilogue __dflush_epilogue
-#define __sflush_prologue {
-#define __sflush_epilogue }
-#define __inv_sflush_prologue __sflush_prologue
-#define __inv_sflush_epilogue __sflush_epilogue
#else /* CONFIG_MIPS_MT */
@@ -137,10 +133,6 @@ extern void mt_cflush_release(void);
#define __dflush_epilogue }
#define __inv_dflush_prologue {
#define __inv_dflush_epilogue }
-#define __sflush_prologue {
-#define __sflush_epilogue }
-#define __inv_sflush_prologue {
-#define __inv_sflush_epilogue }
#endif /* CONFIG_MIPS_MT */
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2014-11-20 21:54 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-09-06 2:27 [PATCH] MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration Leonid Yegoshin
2014-11-20 21:45 ` Ralf Baechle
2014-11-20 21:54 ` Ralf Baechle
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox