From: "Radim Krčmář" <rkrcmar@redhat.com>
To: Wanpeng Li <wanpeng.li@linux.intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 3/3] kvm: x86: Enable Intel XSAVES for guest
Date: Wed, 3 Dec 2014 13:33:32 +0100 [thread overview]
Message-ID: <20141203123331.GA26699@potion.brq.redhat.com> (raw)
In-Reply-To: <1417519290-44063-1-git-send-email-wanpeng.li@linux.intel.com>
2014-12-02 19:21+0800, Wanpeng Li:
> Exporse intel xsaves feature to guest.
0xD.1:ebx ought to be non-zero with XSAVES, even if IA32_XSS is known to
be 0, so we'll need to set it after Paolo's patch.
> Signed-off-by: Wanpeng Li <wanpeng.li@linux.intel.com>
> ---
> arch/x86/kvm/cpuid.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index a4f5ac4..0d919bc 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -267,6 +267,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
> unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
> unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;
> unsigned f_mpx = kvm_x86_ops->mpx_supported() ? F(MPX) : 0;
> + unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
>
> /* cpuid 1.edx */
> const u32 kvm_supported_word0_x86_features =
> @@ -322,7 +323,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
>
> /* cpuid 0xD.1.eax */
> const u32 kvm_supported_word10_x86_features =
> - F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1);
> + F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
>
> /* all calls to cpuid_count() should be made on the same cpu */
> get_cpu();
> --
> 1.9.1
--- rant ---
The documentation isn't clearly backward-compatible, it took me a while
to understand why
EBX Bits 31-00: The size in bytes of the XSAVE area containing all
states enabled by XCRO | IA32_XSS.
Is 0 on my old machine.
Different section gives a better hint by mentioning XSAVES directly
* EBX enumerates the size (in bytes) required by the XSAVES
instruction for an XSAVE area containing all the state components
corresponding to bits currently set in XCR0 | IA32_XSS.
prev parent reply other threads:[~2014-12-03 12:33 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-02 11:21 [PATCH v3 3/3] kvm: x86: Enable Intel XSAVES for guest Wanpeng Li
2014-12-03 12:33 ` Radim Krčmář [this message]
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