From: Wanpeng Li <wanpeng.li@linux.intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, rkrcmar@redhat.com
Subject: Re: [PATCH 6/9] KVM: cpuid: mask more bits in leaf 0xd and subleaves
Date: Fri, 5 Dec 2014 08:34:47 +0800 [thread overview]
Message-ID: <20141205003446.GA6967@kernel> (raw)
In-Reply-To: <1417708634-24333-7-git-send-email-pbonzini@redhat.com>
Hi Paolo,
On Thu, Dec 04, 2014 at 04:57:11PM +0100, Paolo Bonzini wrote:
>- EAX=0Dh, ECX=1: output registers ECX/EDX are reserved.
>
>- EAX=0Dh, ECX>1: output register ECX bit 0 is clear for all the CPUID
>leaves we support, because variable "supported" comes from XCR0 and not
>XSS. Bits above 0 are reserved, so ECX is overall zero. Output register
>EDX is reserved.
>
>Source: Intel Architecture Instruction Set Extensions Programming
>Reference, ref. number 319433-022
>
>Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
>Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
>---
> arch/x86/kvm/cpuid.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
Do you miss this in your patch?
+ /* cpuid 0xD.1.eax */
+ const u32 kvm_supported_word10_x86_features =
+ F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1);
+
In addition, there is bisect issue if this is added in this patch.
(4/9 will take advantage of kvm_supported_word10_x86_features)
Regards,
Wanpeng Li
>diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
>index 2f7bc2de9915..644bfe828ce1 100644
>--- a/arch/x86/kvm/cpuid.c
>+++ b/arch/x86/kvm/cpuid.c
>@@ -482,8 +482,14 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
> entry[i].ebx =
> xstate_required_size(supported,
> true);
>- } else if (entry[i].eax == 0 || !(supported & mask))
>- continue;
>+ } else {
>+ if (entry[i].eax == 0 || !(supported & mask))
>+ continue;
>+ if (WARN_ON_ONCE(entry[i].ecx & 1))
>+ continue;
>+ }
>+ entry[i].ecx = 0;
>+ entry[i].edx = 0;
> entry[i].flags |=
> KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
> ++*nent;
>--
>1.8.3.1
>
next prev parent reply other threads:[~2014-12-05 0:55 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-04 15:57 [PATCH 0/9] Final set of XSAVES patches Paolo Bonzini
2014-12-04 15:57 ` [PATCH 1/9] x86: export get_xsave_addr Paolo Bonzini
2014-12-04 16:34 ` Greg KH
2014-12-04 17:29 ` Paolo Bonzini
2014-12-04 15:57 ` [PATCH 2/9] KVM: x86: support XSAVES usage in the host Paolo Bonzini
2014-12-04 17:56 ` Radim Krčmář
2014-12-04 15:57 ` [PATCH 3/9] KVM: x86: use F() macro throughout cpuid.c Paolo Bonzini
2014-12-04 15:57 ` [PATCH 4/9] kvm: x86: Add kvm_x86_ops hook that enables XSAVES for guest Paolo Bonzini
2014-12-05 13:32 ` Radim Krčmář
2014-12-04 15:57 ` [PATCH 5/9] KVM: cpuid: set CPUID(EAX=0xd,ECX=1).EBX correctly Paolo Bonzini
2014-12-05 0:40 ` Wanpeng Li
2014-12-04 15:57 ` [PATCH 6/9] KVM: cpuid: mask more bits in leaf 0xd and subleaves Paolo Bonzini
2014-12-05 0:34 ` Wanpeng Li [this message]
2014-12-05 1:20 ` Wanpeng Li
2014-12-04 15:57 ` [PATCH 7/9] kvm: x86: handle XSAVES vmcs and vmexit Paolo Bonzini
2014-12-04 18:06 ` Radim Krčmář
2014-12-04 15:57 ` [PATCH 8/9] kvm: vmx: add MSR logic for XSAVES Paolo Bonzini
2014-12-04 18:05 ` Radim Krčmář
2014-12-04 18:07 ` Radim Krčmář
2014-12-04 15:57 ` [PATCH 9/9] kvm: vmx: add nested virtualization support for xsaves Paolo Bonzini
2014-12-04 18:08 ` Radim Krčmář
2014-12-05 1:15 ` [PATCH 0/9] Final set of XSAVES patches Wanpeng Li
2014-12-05 7:27 ` Paolo Bonzini
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