From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933989AbbBDOtN (ORCPT ); Wed, 4 Feb 2015 09:49:13 -0500 Received: from pegase1.c-s.fr ([93.17.236.30]:51739 "EHLO mailhub1.si.c-s.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932767AbbBDOtL (ORCPT ); Wed, 4 Feb 2015 09:49:11 -0500 From: Christophe Leroy To: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , scottwood@freescale.com CC: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Joakim Tjernlund Subject: [PATCH v4 0/5] powerpc8xx: Further optimisation of TLB handling Message-Id: <20150204144908.361E71A5F24@localhost.localdomain> Date: Wed, 4 Feb 2015 15:49:08 +0100 (CET) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patchset provides a further optimisation of TLB handling in the 8xx. Changes are: - Not saving registers like CR when not needed - Adding support to any TASK_SIZE Patchset: 01 - powerpc/8xx: macro for handling CPU15 errata 02 - powerpc/8xx: Handle CR out of exception PROLOG/EPILOG 03 - powerpc/8xx: dont save CR in SCRATCH registers 04 - powerpc/8xx: Use SPRG2 instead of DAR for saving r3 05 - powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000 All changes have been successfully tested on MPC885 Signed-off-by: Christophe Leroy Tested-by: Christophe Leroy --- v3: 01-06 no change ; 07-11 changed v4: 01-06 removed (already in scootwood.git next) ; 07-11 renamed 01-05 and respined against scootwood.git next arch/powerpc/kernel/head_8xx.S | 79 +++++++++++++++++++++++++++--------------- 1 file changed, 51 insertions(+), 28 deletions(-)