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Date: Fri, 27 Feb 2015 07:18:03 -0500
From: Tejun Heo <tj@kernel.org>
To: Vikas Shivappa <vikas.shivappa@linux.intel.com>
Cc: linux-kernel@vger.kernel.org, vikas.shivappa@intel.com,
        matt.fleming@intel.com, hpa@zytor.com, tglx@linutronix.de,
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        dave.hansen@intel.com, andi.kleen@intel.com, tony.luck@intel.com,
        kanaka.d.juvva@intel.com
Subject: Re: [PATCH 3/7] x86/intel_rdt: Support cache bit mask for Intel CAT
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On Fri, Feb 27, 2015 at 07:12:22AM -0500, Tejun Heo wrote:
> I feel a bit underwhelmed about this new controller and its interface.
> It is evidently at a lot lower level and way more niche than what
> other controllers are doing, even cpuset.  At the same time, as long
> as it's well isolated, it piggybacking on cgroup should be okay.  I
> take it that the feature implemented is too coarse to allow for weight
> based distribution?

And, Ingo, Peter, are you guys in general agreeing with this addition?
As Tony said, we don't wanna be left way behind but that doesn't mean
we wanna jump on everything giving off the faintest sign of movement,
which sadly has happened often enough in the storage area at least.

Thanks.

-- 
tejun