From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752795AbbCKUT5 (ORCPT ); Wed, 11 Mar 2015 16:19:57 -0400 Received: from mail.skyhub.de ([78.46.96.112]:59923 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751575AbbCKUTz (ORCPT ); Wed, 11 Mar 2015 16:19:55 -0400 Date: Wed, 11 Mar 2015 21:18:30 +0100 From: Borislav Petkov To: Ross Zwisler Cc: linux-kernel@vger.kernel.org, H Peter Anvin , Ingo Molnar , Thomas Gleixner Subject: Re: [PATCH] x86: Add kerneldoc for pcommit_sfence() Message-ID: <20150311201830.GD3359@pd.tnic> References: <1426097961-24921-1-git-send-email-ross.zwisler@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1426097961-24921-1-git-send-email-ross.zwisler@linux.intel.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 11, 2015 at 12:19:21PM -0600, Ross Zwisler wrote: > Add kerneldoc comments for pcommit_sfence() describing the purpose of > the pcommit instruction and demonstrating the usage of that instruction. > > Signed-off-by: Ross Zwisler > Cc: H Peter Anvin > Cc: Ingo Molnar > Cc: Thomas Gleixner > Cc: Borislav Petkov > --- > arch/x86/include/asm/special_insns.h | 37 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h > index aeb4666e0c0a..1ae81757c05b 100644 > --- a/arch/x86/include/asm/special_insns.h > +++ b/arch/x86/include/asm/special_insns.h > @@ -215,6 +215,43 @@ static inline void clwb(volatile void *__p) > : [pax] "a" (p)); > } > > +/** > + * pcommit_sfence() - persistent commit and fence > + * > + * The pcommit instruction ensures that data that has been flushed from the > + * processor's cache hierarchy with clwb, clflushopt or clflush is accepted to > + * memory and is durable on the DIMM. The primary use case for this is > + * persistent memory. > + * > + * This function shows how to properly use clwb/clflushopt/clflush and pcommit > + * with appropriate fencing: > + * > + * void flush_and_commit_buffer(void *vaddr, unsigned int size) > + * { > + * unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1; > + * char *vend = (char *)vaddr + size; > + * char *p; > + * > + * for (p = (char *)((unsigned long)vaddr & ~clflush_mask); > + * p < vend; p += boot_cpu_data.x86_clflush_size) > + * clwb(p); > + * > + * // sfence to order clwb/clflushopt/clflush cache flushes > + * // mfence via mb() also works > + * wmb(); > + * > + * // pcommit and the required sfence for ordering > + * pcommit_sfence(); > + * } > + * > + * After this function completes the data pointed to by vaddr is has been s/is // I fixed it up while applying, thanks. -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. --