Re: [RFC] x86 XIP

[Jim Kukunas <james.t.kukunas@linux.intel.com>]

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On Mon, Mar 23, 2015 at 09:07:14AM +0100, Ingo Molnar wrote:
> * Jim Kukunas <james.t.kukunas@linux.intel.com> wrote:
> 
> > 
> > Hi Folks,
> > 
> > This patchset introduces eXecute-In-Place (XIP) support for x86. 
> > [...]
> 
> So we'd need a lot better high level description than this:

In future patch revisions, I'll update my coverletter to include the
information below.

>  - a bit of background description: what are the advantages of having
>    the kernel image in non-RAM (flash), etc.

Currently for tiny memory-constrained embedded systems, the kernel
configuration is usually stripped down in order to reduce the kernel's 
RAM footprint, freeing up more precious memory for user space and allowing
the kernel to fit into smaller systems.  With XIP, the kernel's text and
read-only data sections are never loaded into RAM, thereby reducing the
kernel's memory usage. Also, since a significant portion of the kernel
is never loaded into RAM, a larger kernel configuration can be used without
bloating memory usage. I haven't done any performance analysis yet, but it's
probably safe to say that executing from storage will negatively affect
performance.

>  - on what hardware/bootloaders is or will be XIP supported?

With regards to supported hardware, these patches aren't targeting any
specific platform. As mentioned in the coverletter, there are current
limits on the supported configurations (32-bit only, no SMP, no PAE),
but these are not technical limits ... I just need to implement support
for them.

With regards to supported bootloaders, I've been testing with a small
bootloader that I wrote specifically for XIP. Which other bootloaders
I add support to will depend on the feedback/requests that I get.

> Also, there should probably be some fail-safe mechanism included: such
> as to check whether caching attributes (MTRRs, PAT) are properly set 
> for the XIP area (at minimum to not be uncacheable).

Good idea. I'll add that into the next revision.

Thanks.

-- 
Jim Kukunas
Intel Open Source Technology Center

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