From: Andi Kleen <ak@linux.intel.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
x86@kernel.org, Don Zickus <dzickus@redhat.com>,
Frederic Weisbecker <fweisbec@gmail.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Anton Blanchard <anton@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>,
linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH v1] watchdog: Use a reference cycle counter to avoid scaling issues
Date: Thu, 23 Apr 2015 17:51:33 -0700 [thread overview]
Message-ID: <20150424005133.GK13605@tassilo.jf.intel.com> (raw)
In-Reply-To: <alpine.DEB.2.11.1504232242510.13914@nanos>
> We can just detect the deviation in the callback itself:
>
> u64 now = ktime_get_mono_fast_ns();
>
> if (now - __this_cpu_read(nmi_timestamp) < period)
> return;
>
> __this_cpu_write(nmi_timestamp, now);
>
> It's that simple.
It's a simple short term hac^wsolution. But if we had a (hypothetical) system with
let's say 10*TSC max you may end up with quite a few false ticks, as in
unnecessary interrupts. With 100*TSC it would be really bad.
There were systems in the past that ran TSC at a much slower frequency,
such as the early AMD Barcelona systems.
So the problem may eventually come back if not solved properly.
-Andi
--
ak@linux.intel.com -- Speaking for myself only
next prev parent reply other threads:[~2015-04-24 0:51 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-23 15:03 [PATCH v1] watchdog: Use a reference cycle counter to avoid scaling issues Alexander Shishkin
2015-04-23 20:01 ` Thomas Gleixner
2015-04-23 20:32 ` Andi Kleen
2015-04-23 21:37 ` Thomas Gleixner
2015-04-24 0:51 ` Andi Kleen [this message]
2015-04-24 8:44 ` Thomas Gleixner
2015-04-24 9:35 ` Thomas Gleixner
2015-04-24 9:46 ` Alexander Shishkin
2015-04-24 9:48 ` Thomas Gleixner
2015-04-24 9:59 ` Andi Kleen
2015-04-24 11:50 ` Thomas Gleixner
2015-04-24 9:01 ` Borislav Petkov
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