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Date: Mon, 27 Apr 2015 20:38:54 +0200
From: Borislav Petkov <bp@alien8.de>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>, Andy Lutomirski <luto@kernel.org>,
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Subject: Re: [PATCH] x86_64, asm: Work around AMD SYSRET SS descriptor
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On Mon, Apr 27, 2015 at 11:14:15AM -0700, Linus Torvalds wrote:
> Btw, please don't use the "more than three 66h overrides" version.

Oh yeah, a notorious "frontend choker".

> Sure, that's what the optimization manual suggests if you want
> single-instruction decode for all sizes up to 15 bytes, but I think
> we're better off with the two-nop case for sizes 12-15) (4-byte nop
> followed by 8-11 byte nop).

Yeah, so says the manual. Although I wouldn't trust those manuals
blindly but that's another story.

> Because the "more than three 66b prefixes" really performs abysmally
> on some cores, iirc.

Right.

So our current NOP-infrastructure does ASM_NOP_MAX NOPs of 8 bytes so
without more invasive changes, our longest NOPs are 8 byte long and then
we have to repeat. This is consistent with what the code looks like here
after alternatives application:

ffffffff815b9084 <syscall_return>:
...

ffffffff815b90ac:       0f 1f 84 00 00 00 00    nopl   0x0(%rax,%rax,1)
ffffffff815b90b3:       00 
ffffffff815b90b4:       0f 1f 84 00 00 00 00    nopl   0x0(%rax,%rax,1)
ffffffff815b90bb:       00 
ffffffff815b90bc:       90                      nop

You can recognize the p6_nops being the same as in-the-manual-suggested
F16h ones.

:-)

I'm running them now and will report numbers relative to the last run
once it is done. And those numbers should in practice get even better if
we revert to the simpler canonical-ness check but let's see...

Thanks.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.
--