From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031188AbbD1WQP (ORCPT ); Tue, 28 Apr 2015 18:16:15 -0400 Received: from mta-out1.inet.fi ([62.71.2.227]:46320 "EHLO kirsi1.inet.fi" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030444AbbD1WQK (ORCPT ); Tue, 28 Apr 2015 18:16:10 -0400 Date: Wed, 29 Apr 2015 01:15:53 +0300 From: "Kirill A. Shutemov" To: Andy Lutomirski , Dave Hansen Cc: Linus Torvalds , Andrew Morton , Mel Gorman , Rik van Riel , linux-kernel@vger.kernel.org, linux-mm@kvack.org, x86@kernel.org Subject: PCID and TLB flushes (was: [GIT PULL] kdbus for 4.1-rc1) Message-ID: <20150428221553.GA5770@node.dhcp.inet.fi> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.23.1 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Apr 28, 2015 at 01:42:10PM -0700, Andy Lutomirski wrote: > At some point, I'd like to implement PCID on x86 (if no one beats me > to it, and this is a low priority for me), which will allow us to skip > expensive TLB flushes while context switching. I have no idea whether > ARM can do something similar. I talked with Dave about implementing PCID and he thinks that it will be net loss. TLB entries will live longer and it means we would need to trigger more IPIs to flash them out when we have to. Cost of IPIs will be higher than benifit from hot TLB after context switch. Do you have different expectations? -- Kirill A. Shutemov