From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752990AbbEFFyN (ORCPT ); Wed, 6 May 2015 01:54:13 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:51512 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752795AbbEFFyL (ORCPT ); Wed, 6 May 2015 01:54:11 -0400 Date: Tue, 5 May 2015 22:54:10 -0700 From: Stephen Boyd To: Sascha Hauer Cc: Mike Turquette , YH Chen , linux-kernel@vger.kernel.org, Henry Chen , linux-mediatek@lists.infradead.org, kernel@pengutronix.de, Matthias Brugger , Yingjoe Chen , Eddie Huang , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v12] clk: Add common clock support for Mediatek MT8135 and MT8173 Message-ID: <20150506055410.GC10871@codeaurora.org> References: <1429778143-2074-1-git-send-email-s.hauer@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1429778143-2074-1-git-send-email-s.hauer@pengutronix.de> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/23, Sascha Hauer wrote: > The following changes since commit 39a8804455fb23f09157341d3ba7db6d7ae6ee76: > > Linux 4.0 (2015-04-12 15:12:50 -0700) > > are available in the git repository at: > > git://git.pengutronix.de/git/sha/linux-2.6.git tags/v4.0-clk-mediatek-v12 > > for you to fetch changes up to e0ebeaa8a3f4a762cb9c2780170445aad15915d1: > > dt-bindings: ARM: Mediatek: Document devicetree bindings for clock/reset controllers (2015-04-23 10:22:34 +0200) > > ---------------------------------------------------------------- > This patchset contains the initial common clock support for Mediatek SoCs. > Mediatek SoC's clock architecture comprises of various PLLs, dividers, muxes > and clock gates. Applied to clk-next. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project