Re: [PATCH v4 2/6] x86: document WC MTRR effects on PAT / non-PAT pages

Luis R. Rodriguez
2015-05-05T07:35:31Z

On Mon, May 04, 2015 at 02:23:03PM +0200, Borislav Petkov wrote:
> On Wed, Apr 29, 2015 at 02:44:07PM -0700, Luis R. Rodriguez wrote:
> > From: "Luis R. Rodriguez" <mcgrof@suse.com>
> >
> > As part of the effort to phase out MTRR use document
> > write-combining MTRR effects on pages with different
> > non-PAT page attributes flags and different PAT entry
> > values. Extend arch_phys_wc_add() documentation to
> > clarify power of two sizes / boundary requirements as
> > we phase out mtrr_add() use.
> >
> > Lastly hint towards ioremap_uc() for corner cases on
> > device drivers working with devices with mixed regions
> > where MTRR size requirements would otherwise not
> > enable write-combining effective memory types.
> >
> > Cc: Toshi Kani <toshi.kani@hp.com>
> > Cc: Jonathan Corbet <corbet@lwn.net>
> > Cc: Dave Hansen <dave.hansen@linux.intel.com>
> > Cc: Andy Lutomirski <luto@amacapital.net>
> > Cc: Suresh Siddha <sbsiddha@gmail.com>
> > Cc: Ingo Molnar <mingo@elte.hu>
> > Cc: Thomas Gleixner <tglx@linutronix.de>
> > Cc: Juergen Gross <jgross@suse.com>
> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> > Cc: Dave Airlie <airlied@redhat.com>
> > Cc: Antonino Daplas <adaplas@gmail.com>
> > Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
> > Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
> > Cc: Ville Syrjälä <syrjala@sci.fi>
> > Cc: Mel Gorman <mgorman@suse.de>
> > Cc: Vlastimil Babka <vbabka@suse.cz>
> > Cc: Borislav Petkov <bp@suse.de>
> > Cc: Davidlohr Bueso <dbueso@suse.de>
> > Cc: linux-fbdev@vger.kernel.org
> > Cc: linux-kernel@vger.kernel.org
> > Signed-off-by: Luis R. Rodriguez <mcgrof@suse.com>
> > ---
> > Documentation/x86/mtrr.txt | 18 +++++++++++++++---
> > Documentation/x86/pat.txt | 40 +++++++++++++++++++++++++++++++++++++++-
> > arch/x86/kernel/cpu/mtrr/main.c | 3 +++
> > 3 files changed, 57 insertions(+), 4 deletions(-)
> >
> > diff --git a/Documentation/x86/mtrr.txt b/Documentation/x86/mtrr.txt
> > index cc071dc..a111a6c 100644
> > --- a/Documentation/x86/mtrr.txt
> > +++ b/Documentation/x86/mtrr.txt
> > @@ -1,7 +1,19 @@
> > MTRR (Memory Type Range Register) control
> > -3 Jun 1999
> > -Richard Gooch
> > -<rgooch@atnf.csiro.au>
> > +
> > +Richard Gooch <rgooch@atnf.csiro.au> - 3 Jun 1999
> > +Luis R. Rodriguez <mcgrof@do-not-panic.com> - April 9, 2015
> > +
> > +===============================================================================
> > +Phasing MTRR use
>
> "Phasing out...".

Fixed all, will send another version.

Luis