Re: Mwait usage on AMD processors

[Huang Rui <ray.huang@amd.com>]

On Thu, May 14, 2015 at 10:20:51PM +0800, Borislav Petkov wrote:
> On Thu, May 14, 2015 at 09:38:57PM +0800, Huang Rui wrote:
> > Is C1E here you mentioned is waiting state that use mwaitx enters at
> > AMD platform? If yes, please see below comments:
> > 
> > Current processor:
> > Power saving: C0 < C1E (AMD) < C1
> 
> How is C1 > C1E ?
> 
> C1E is the Enhanced C1.
> 

Apology that cause to misunderstand. It's not as same as intel.
Intel is able to go to C1E like you said, the C1E has less power
consumption than C1 on Intel platform.

But on AMD platform, mwaitx/mwait cannot go to C1 or C1E
like intel. The power consumption of waiting phase is somewhere in
between (C0 and C1). Actually, it's still in C0 but less power
consumption than normal C0.

> > Performance: Halt < Mwait <= Mwaitx
> 
> What performance? You're idle.
> 

The faster waiting exit speed. But it's hard to test the improvement,
do you have any idea? It's told by HW designer.

> > Halt -> C1, and Mwaitx/Mwait -> C1E (AMD)
> 
> Huh? Right now we do HLT on all AMD and the hw enters C1E after a bunch
> of stuff is fulfilled first. Are the plans to enter C1E from MWAIT now?
> 

Yes, I see all AMD platform only use HLT at current.

> > Consider about the balance between power consumption and performance,
> > so we want to expose the interface. And mwaitx has different opcode
> > with traditional mwait.
> 
> There's alternative()'s for that.
> 
> > Due to C1E (AMD) less power saving that real C1, so you can think it
> > still in C0 at current.
> 
> Which CPUs, current or upcoming?
> 

Current CPU, power consumption cannot go to deeper low power state
(C1) via mwaitx/mwait. But HW designers will implement it in future
processors.

Thanks,
Rui